[llvm] [X86][GlobalISel] Added support for llvm.set.rounding (PR #156591)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 16 07:40:30 PDT 2025


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@@ -894,18 +894,43 @@ bool X86LegalizerInfo::legalizeSETROUNDING(MachineInstr &MI,
   auto ClearedCWD =
       MIRBuilder.buildAnd(s16, CWD16, MIRBuilder.buildConstant(s16, 0xf3ff));
 
-  // Convert Src (rounding mode) to bits for control word
-  // (0xc9 << (2 * Src + 4)) & 0xc00
-  auto Src32 = MIRBuilder.buildZExtOrTrunc(s32, Src);
-  auto ShiftAmt = MIRBuilder.buildAdd(
-      s32, MIRBuilder.buildShl(s32, Src32, MIRBuilder.buildConstant(s32, 1)),
-      MIRBuilder.buildConstant(s32, 4));
-  auto ShiftAmt8 = MIRBuilder.buildTrunc(s8, ShiftAmt);
-  auto Shifted =
-      MIRBuilder.buildShl(s16, MIRBuilder.buildConstant(s16, 0xc9), ShiftAmt8);
-  auto RMBits =
-      MIRBuilder.buildAnd(s16, Shifted, MIRBuilder.buildConstant(s16, 0xc00));
-
+  // Check if Src is a constant
+  auto *SrcDef = MRI.getVRegDef(Src);
+  Register RMBits;
+  if (SrcDef && SrcDef->getOpcode() == TargetOpcode::G_CONSTANT) {
+    uint64_t RM = getIConstantFromReg(Src, MRI).getZExtValue();
+    int FieldVal;
+    switch (static_cast<RoundingMode>(RM)) {
----------------
arsenm wrote:

This should probably be a standalone conversion function, with the diagnostic, shared between all the selectors 

https://github.com/llvm/llvm-project/pull/156591


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