[llvm] [NFC][TableGen] Move decoder tests to DecoderEmitter directory (PR #159040)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 16 04:57:28 PDT 2025
https://github.com/jurahul updated https://github.com/llvm/llvm-project/pull/159040
>From f9668780fd3e3565129039663b76f58344c833cf Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Tue, 16 Sep 2025 04:23:55 -0700
Subject: [PATCH 1/2] [NFC][TableGen] Move decoder tests to Decodermitter
directory
---
.../TableGen/{ => DecoderEmitter}/AsmPredicateCondsEmission.td | 0
.../{ => DecoderEmitter}/DecoderEmitterBitwidthSpecialization.td | 0
llvm/test/TableGen/{ => DecoderEmitter}/DecoderEmitterFnTable.td | 0
llvm/test/TableGen/{ => DecoderEmitter}/VarLenDecoder.td | 0
llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission.td | 0
llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission2.td | 0
llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission3.td | 0
llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission4.td | 0
8 files changed, 0 insertions(+), 0 deletions(-)
rename llvm/test/TableGen/{ => DecoderEmitter}/AsmPredicateCondsEmission.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/DecoderEmitterBitwidthSpecialization.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/DecoderEmitterFnTable.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/VarLenDecoder.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission2.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission3.td (100%)
rename llvm/test/TableGen/{ => DecoderEmitter}/trydecode-emission4.td (100%)
diff --git a/llvm/test/TableGen/AsmPredicateCondsEmission.td b/llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
similarity index 100%
rename from llvm/test/TableGen/AsmPredicateCondsEmission.td
rename to llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
diff --git a/llvm/test/TableGen/DecoderEmitterBitwidthSpecialization.td b/llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
similarity index 100%
rename from llvm/test/TableGen/DecoderEmitterBitwidthSpecialization.td
rename to llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
diff --git a/llvm/test/TableGen/DecoderEmitterFnTable.td b/llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
similarity index 100%
rename from llvm/test/TableGen/DecoderEmitterFnTable.td
rename to llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
diff --git a/llvm/test/TableGen/VarLenDecoder.td b/llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
similarity index 100%
rename from llvm/test/TableGen/VarLenDecoder.td
rename to llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
diff --git a/llvm/test/TableGen/trydecode-emission.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
similarity index 100%
rename from llvm/test/TableGen/trydecode-emission.td
rename to llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
diff --git a/llvm/test/TableGen/trydecode-emission2.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
similarity index 100%
rename from llvm/test/TableGen/trydecode-emission2.td
rename to llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
diff --git a/llvm/test/TableGen/trydecode-emission3.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
similarity index 100%
rename from llvm/test/TableGen/trydecode-emission3.td
rename to llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
diff --git a/llvm/test/TableGen/trydecode-emission4.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
similarity index 100%
rename from llvm/test/TableGen/trydecode-emission4.td
rename to llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
>From ab92f11ae59108cfeba289b4c51d0bef044a05b2 Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Tue, 16 Sep 2025 04:56:54 -0700
Subject: [PATCH 2/2] Adjust include path
---
.../TableGen/DecoderEmitter/AsmPredicateCondsEmission.td | 2 +-
.../DecoderEmitter/DecoderEmitterBitwidthSpecialization.td | 6 +++---
llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td | 2 +-
llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td | 4 ++--
llvm/test/TableGen/DecoderEmitter/trydecode-emission.td | 4 ++--
llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td | 4 ++--
llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td | 4 ++--
llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td | 4 ++--
8 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td b/llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
index 25bc1ab95a14f..6178a4f9fe609 100644
--- a/llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
+++ b/llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
@@ -1,4 +1,4 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
// Check that we don't generate invalid code of the form "( && Cond2)" when
// emitting AssemblerPredicate conditions. In the example below, the invalid
diff --git a/llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td b/llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
index c656616a62451..71b0c99675baa 100644
--- a/llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
+++ b/llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
@@ -1,6 +1,6 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-DEFAULT
-// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-NO-TABLE
-// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -use-fn-table-in-decode-to-mcinst -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-TABLE
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-DEFAULT
+// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-NO-TABLE
+// RUN: llvm-tblgen -gen-disassembler -specialize-decoders-per-bitwidth -use-fn-table-in-decode-to-mcinst -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-SPECIALIZE-TABLE
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td b/llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
index 8929e6da716e6..455089588511f 100644
--- a/llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
+++ b/llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
@@ -1,4 +1,4 @@
-// RUN: llvm-tblgen -gen-disassembler -use-fn-table-in-decode-to-mcinst -I %p/../../include %s | FileCheck %s
+// RUN: llvm-tblgen -gen-disassembler -use-fn-table-in-decode-to-mcinst -I %p/../../../include %s | FileCheck %s
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td b/llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
index c02433ffba3cd..0d913dc7587ed 100644
--- a/llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
+++ b/llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
@@ -1,5 +1,5 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL
-// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-LARGE
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL
+// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefixes=CHECK,CHECK-LARGE
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/DecoderEmitter/trydecode-emission.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
index c4e288e36676a..cdb1e327ad07d 100644
--- a/llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
+++ b/llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
@@ -1,5 +1,5 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
-// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
+// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
// Check that if decoding of an instruction fails and the instruction does not
// have a complete decoder method that can determine if the bitpattern is valid
diff --git a/llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
index c628a860e100e..35657ff35c86f 100644
--- a/llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
+++ b/llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
@@ -1,5 +1,5 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
-// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
+// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
index 66fe7050e3ea7..4ac868dbb51aa 100644
--- a/llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
+++ b/llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
@@ -1,5 +1,5 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
-// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
+// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
include "llvm/Target/Target.td"
diff --git a/llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td b/llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
index 2432655e13129..ff1a7e33747ba 100644
--- a/llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
+++ b/llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
@@ -1,5 +1,5 @@
-// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
-// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
+// RUN: llvm-tblgen -gen-disassembler --large-decoder-table -I %p/../../../include %s | FileCheck %s --check-prefix=CHECK-LARGE
// Test for OPC_ExtractField/OPC_CheckField with start bit > 255.
// These large start values may arise for architectures with long instruction
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