[llvm] [TableGen] Add mapping from processor ID to resource index for packetizer (PR #158182)
Haohai Wen via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 15 18:05:52 PDT 2025
================
@@ -0,0 +1,40 @@
+// RUN: llvm-tblgen -gen-dfa-packetizer -I %p/../../include %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+
+def TestTarget : Target;
+
+def TestSchedModel : SchedMachineModel {
+ let CompleteModel = 0;
+}
+
+def TestProcessor1 : ProcessorModel<"testprocessor1", TestSchedModel, []>;
+
+def FU0 : FuncUnit;
+def FU1 : FuncUnit;
+
+def OP0 : InstrItinClass;
+def OP1 : InstrItinClass;
+
+def Itin {
+ list<InstrItinData> ItinList = [
+ InstrItinData<OP0, [InstrStage<1, [FU0]>]>,
+ InstrItinData<OP1, [InstrStage<1, [FU1]>]>,
+ ];
+}
+
+// CHECK: int TestTargetGetResourceIndex(unsigned ProcID) {
+// CHECK-NEXT: static const unsigned TestTargetProcIdToProcResourceIdxTable[][2] = {
+// CHECK-NEXT: { 2, 1 }, // TestItinerariesModel
+// CHECK-NEXT: };
+// CHECK-NEXT: auto It = std::lower_bound(
+// CHECK-NEXT: std::begin(TestTargetProcIdToProcResourceIdxTable),
+// CHECK-NEXT: std::end(TestTargetProcIdToProcResourceIdxTable), ProcID,
+// CHECK-NEXT: [](const unsigned LHS[], unsigned Val) { return LHS[0] < Val; });
+// CHECK-NEXT: return (*It)[1];
----------------
HaohaiWen wrote:
Add assert(*It[0] == ProcID) here?
https://github.com/llvm/llvm-project/pull/158182
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