[llvm] [RISCV][GISel] Remove shouldBeInFConstantPool. Always convert G_FCONSTANT to G_CONSTANT without F/D. (PR #158717)
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Mon Sep 15 12:07:53 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
We can unconditionally convert to G_CONSTANT. G_CONSTANT will go through its own legalization and call the integer shouldBeInConstantPool.
---
Full diff: https://github.com/llvm/llvm-project/pull/158717.diff
2 Files Affected:
- (modified) llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp (+1-14)
- (modified) llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h (-1)
``````````diff
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 82a571587cc77..9ce0ee1be7ea7 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -871,17 +871,6 @@ bool RISCVLegalizerInfo::shouldBeInConstantPool(const APInt &APImm,
return !(!SeqLo.empty() && (SeqLo.size() + 2) <= STI.getMaxBuildIntsCost());
}
-bool RISCVLegalizerInfo::shouldBeInFConstantPool(const APFloat &APF) const {
- [[maybe_unused]] unsigned Size = APF.getSizeInBits(APF.getSemantics());
- assert((Size == 32 || Size == 64) && "Only support f32 and f64");
-
- int64_t Imm = APF.bitcastToAPInt().getSExtValue();
- RISCVMatInt::InstSeq Seq = RISCVMatInt::generateInstSeq(Imm, STI);
- if (Seq.size() <= STI.getMaxBuildIntsCost())
- return false;
- return true;
-}
-
bool RISCVLegalizerInfo::legalizeVScale(MachineInstr &MI,
MachineIRBuilder &MIB) const {
const LLT XLenTy(STI.getXLenVT());
@@ -1372,9 +1361,7 @@ bool RISCVLegalizerInfo::legalizeCustom(
case TargetOpcode::G_ABS:
return Helper.lowerAbsToMaxNeg(MI);
case TargetOpcode::G_FCONSTANT: {
- const APFloat FVal = MI.getOperand(1).getFPImm()->getValueAPF();
- if (shouldBeInFConstantPool(FVal))
- return Helper.lowerFConstant(MI);
+ const APFloat &FVal = MI.getOperand(1).getFPImm()->getValueAPF();
// Convert G_FCONSTANT to G_CONSTANT.
Register DstReg = MI.getOperand(0).getReg();
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
index bd6d1665849c8..4451866745194 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
@@ -39,7 +39,6 @@ class RISCVLegalizerInfo : public LegalizerInfo {
private:
bool shouldBeInConstantPool(const APInt &APImm, bool ShouldOptForSize) const;
- bool shouldBeInFConstantPool(const APFloat &APImm) const;
bool legalizeShlAshrLshr(MachineInstr &MI, MachineIRBuilder &MIRBuilder,
GISelChangeObserver &Observer) const;
``````````
</details>
https://github.com/llvm/llvm-project/pull/158717
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