[llvm] bc745dc - [LegalizeTypes] Use getShiftAmountConstant in PromoteIntRes_FunnelShift. (#158553)
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Mon Sep 15 10:29:23 PDT 2025
Author: Craig Topper
Date: 2025-09-15T10:29:19-07:00
New Revision: bc745dcd788f80441ba4151e2c80f86c95c966aa
URL: https://github.com/llvm/llvm-project/commit/bc745dcd788f80441ba4151e2c80f86c95c966aa
DIFF: https://github.com/llvm/llvm-project/commit/bc745dcd788f80441ba4151e2c80f86c95c966aa.diff
LOG: [LegalizeTypes] Use getShiftAmountConstant in PromoteIntRes_FunnelShift. (#158553)
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 354aeff0c60ea..ba424198ad5b7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1613,7 +1613,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_FunnelShift(SDNode *N) {
// fshr(x,y,z) -> (((aext(x) << bw) | zext(y)) >> (z % bw)).
if (NewBits >= (2 * OldBits) && !isa<ConstantSDNode>(Amt) &&
!TLI.isOperationLegalOrCustom(Opcode, VT)) {
- SDValue HiShift = DAG.getConstant(OldBits, DL, VT);
+ SDValue HiShift = DAG.getShiftAmountConstant(OldBits, VT, DL);
Hi = DAG.getNode(ISD::SHL, DL, VT, Hi, HiShift);
Lo = DAG.getZeroExtendInReg(Lo, DL, OldVT);
SDValue Res = DAG.getNode(ISD::OR, DL, VT, Hi, Lo);
@@ -1624,13 +1624,14 @@ SDValue DAGTypeLegalizer::PromoteIntRes_FunnelShift(SDNode *N) {
}
// Shift Lo up to occupy the upper bits of the promoted type.
- SDValue ShiftOffset = DAG.getConstant(NewBits - OldBits, DL, AmtVT);
- Lo = DAG.getNode(ISD::SHL, DL, VT, Lo, ShiftOffset);
+ Lo = DAG.getNode(ISD::SHL, DL, VT, Lo,
+ DAG.getShiftAmountConstant(NewBits - OldBits, VT, DL));
// Increase Amount to shift the result into the lower bits of the promoted
// type.
if (IsFSHR)
- Amt = DAG.getNode(ISD::ADD, DL, AmtVT, Amt, ShiftOffset);
+ Amt = DAG.getNode(ISD::ADD, DL, AmtVT, Amt,
+ DAG.getConstant(NewBits - OldBits, DL, VT));
return DAG.getNode(Opcode, DL, VT, Hi, Lo, Amt);
}
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