[llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)
Mel Chen via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 15 03:13:13 PDT 2025
================
@@ -2281,21 +2295,37 @@ InstructionCost VPWidenCastRecipe::computeCost(ElementCount VF,
return TTI::CastContextHint::Normal;
};
+ using namespace llvm::VPlanPatternMatch;
VPValue *Operand = getOperand(0);
TTI::CastContextHint CCH = TTI::CastContextHint::None;
// For Trunc/FPTrunc, get the context from the only user.
- if ((Opcode == Instruction::Trunc || Opcode == Instruction::FPTrunc) &&
- !hasMoreThanOneUniqueUser() && getNumUsers() > 0) {
- if (auto *StoreRecipe = dyn_cast<VPRecipeBase>(*user_begin()))
- CCH = ComputeCCH(StoreRecipe);
+ if (Opcode == Instruction::Trunc || Opcode == Instruction::FPTrunc) {
+ auto GetOnlyUser = [](const VPSingleDefRecipe *R) -> VPRecipeBase * {
+ if (R->getNumUsers() == 0 || R->hasMoreThanOneUniqueUser())
+ return nullptr;
+ return dyn_cast<VPRecipeBase>(*R->user_begin());
+ };
+
+ if (VPRecipeBase *Recipe = GetOnlyUser(this)) {
+ if (match(Recipe, m_VPInstruction<VPInstruction::Reverse>(m_VPValue())))
+ Recipe = GetOnlyUser(cast<VPInstruction>(Recipe));
+ if (Recipe)
+ CCH = ComputeCCH(Recipe);
----------------
Mel-Chen wrote:
RISC-V currently doesn’t have memory access instructions like this; AArch64 seems to have some. But I’m not sure if AArch64 supports combining load + shuffle + cast into a single instruction (I haven’t found one so far). Also, the current AArch64 TTI doesn’t use CastContextHint::Reversed for its decisions. I’m thinking that if load + reverse + cast can’t be combined into a load, maybe we could just remove CastContextHint::Reversed and return CastContextHint::None instead. What do you think?
cc. @david-arm
https://github.com/llvm/llvm-project/pull/146525
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