[llvm] [MachineLICM] Rematerialize instructions that may be hoisted before LICM (PR #158479)

[via llvm-commits]

sharkautarch wrote:

@dianqk it looks like the remainder of the hoisted instructions in the test c file in https://github.com/llvm/llvm-project/issues/115862 that MachineLICM currently fails to sink w/ `-mllvm -sink-insts-to-avoid-spills=1`, is due to this line:
https://github.com/llvm/llvm-project/blob/8007022caf47372abc73865b3b90e888c23983ad/llvm/lib/CodeGen/MachineSink.cpp#L1748

this I inferred from the debug output regarding some of the hoisted instructions:
```
CycleSink: Analysing candidate: %239:gr32 = nsw ADD32ri %234:gr32(tied-def 0), 2, implicit-def dead $eflags
CycleSink: Instruction added as candidate.
CycleSink: Analysing candidate: %240:gr32 = nsw ADD32ri %235:gr32(tied-def 0), 2, implicit-def dead $eflags
CycleSink: Instruction added as candidate.
...
CycleSink: Analysing candidate: %0:gr64_nosp = MOVSX64rr32 %239:gr32
CycleSink: Instruction added as candidate.
CycleSink: Analysing candidate: %1:gr64_nosp = MOVSX64rr32 %240:gr32
CycleSink: Instruction added as candidate.
...
AggressiveCycleSink: Finding sink block for: %1:gr64_nosp = MOVSX64rr32 %240:gr32
AggressiveCycleSink:   Analysing use: 0x55d4e30cee10AggressiveCycleSink: Sinking instruction to block: %bb.8
AggressiveCycleSink: Finding sink block for: %0:gr64_nosp = MOVSX64rr32 %239:gr32
AggressiveCycleSink:   Analysing use: 0x55d4e30cecc8AggressiveCycleSink: Sinking instruction to block: %bb.8
```
Portion of the Machine IR showing said hoisted instructions (printed by compiling w/ `-mllvm --print-changed=diff-quiet -mllvm --filter-print-funcs=loop`) in function loop:
```diff
*** IR Dump After Machine code sinking (machine-sink) on loop ***
 # Machine code for function loop: IsSSA, TracksLiveness
 Function Live Ins: $edi in %232, $rsi in %233, $edx in %234, $ecx in %235, $r8d in %236, $r9d in %237
 
 bb.0.entry:
   successors: %bb.1(0x80000000); %bb.1(100.00%)
   liveins: $edi, $rsi, $edx, $ecx, $r8d, $r9d
   %237:gr32 = COPY $r9d
   %236:gr32 = COPY $r8d
   %235:gr32 = COPY $ecx
   %234:gr32 = COPY $edx
   %233:gr64 = COPY $rsi
   %232:gr32 = COPY $edi
   %239:gr32 = nsw ADD32ri %234:gr32(tied-def 0), 2, implicit-def dead $eflags
   %240:gr32 = nsw ADD32ri %235:gr32(tied-def 0), 2, implicit-def dead $eflags
-  %0:gr64_nosp = MOVSX64rr32 %239:gr32
-  %1:gr64_nosp = MOVSX64rr32 %240:gr32
``` 
Which indicates that the hoisted add instructions aren't sinked by AggressiveCycleSink, because they have more than one def, but the sign extensions on the output of the hoisted add instructions *are* sinked by AggressiveCycleSink, because they don't have more than one def

https://github.com/llvm/llvm-project/pull/158479