[llvm] e07b596 - [InstCombine] Fold select pattern with sub and negation to abs intrinsic (#156246)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 14 05:29:41 PDT 2025
Author: AZero13
Date: 2025-09-14T20:29:37+08:00
New Revision: e07b5968d4ac1515582ad578aaa5497782972666
URL: https://github.com/llvm/llvm-project/commit/e07b5968d4ac1515582ad578aaa5497782972666
DIFF: https://github.com/llvm/llvm-project/commit/e07b5968d4ac1515582ad578aaa5497782972666.diff
LOG: [InstCombine] Fold select pattern with sub and negation to abs intrinsic (#156246)
```llvm
%sub = sub nsw T %x, %y
%cmp = icmp sgt T %x, %y ; or sge
%neg = sub T 0, %sub
%abs = select i1 %cmp, T %sub, T %neg
```
becomes:
```llvm
%sub = sub nsw T %x, %y
%abs = call T @llvm.abs.T(T %sub, i1 false)
```
Alive2: https://alive2.llvm.org/ce/z/ApdJX8
https://alive2.llvm.org/ce/z/gRTmZk
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/test/Transforms/InstCombine/abs-intrinsic.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 9467463d39c0e..8f9d0bf6240d5 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1153,6 +1153,38 @@ static Value *foldAbsDiff(ICmpInst *Cmp, Value *TVal, Value *FVal,
return Builder.CreateBinaryIntrinsic(Intrinsic::abs, TI, Builder.getTrue());
}
+ // Match: (A > B) ? (A - B) : (0 - (A - B)) --> abs(A - B)
+ if (Pred == CmpInst::ICMP_SGT &&
+ match(TI, m_NSWSub(m_Specific(A), m_Specific(B))) &&
+ match(FI, m_Neg(m_Specific(TI)))) {
+ return Builder.CreateBinaryIntrinsic(Intrinsic::abs, TI,
+ Builder.getFalse());
+ }
+
+ // Match: (A < B) ? (0 - (A - B)) : (A - B) --> abs(A - B)
+ if (Pred == CmpInst::ICMP_SLT &&
+ match(FI, m_NSWSub(m_Specific(A), m_Specific(B))) &&
+ match(TI, m_Neg(m_Specific(FI)))) {
+ return Builder.CreateBinaryIntrinsic(Intrinsic::abs, FI,
+ Builder.getFalse());
+ }
+
+ // Match: (A > B) ? (0 - (B - A)) : (B - A) --> abs(B - A)
+ if (Pred == CmpInst::ICMP_SGT &&
+ match(FI, m_NSWSub(m_Specific(B), m_Specific(A))) &&
+ match(TI, m_Neg(m_Specific(FI)))) {
+ return Builder.CreateBinaryIntrinsic(Intrinsic::abs, FI,
+ Builder.getFalse());
+ }
+
+ // Match: (A < B) ? (B - A) : (0 - (B - A)) --> abs(B - A)
+ if (Pred == CmpInst::ICMP_SLT &&
+ match(TI, m_NSWSub(m_Specific(B), m_Specific(A))) &&
+ match(FI, m_Neg(m_Specific(TI)))) {
+ return Builder.CreateBinaryIntrinsic(Intrinsic::abs, TI,
+ Builder.getFalse());
+ }
+
return nullptr;
}
diff --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index 346111d892975..763d82652dd5d 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -859,4 +859,141 @@ define i32 @abs_range_metadata(i32 %x) {
%b = and i32 %a, 15
ret i32 %b
}
+
!1 = !{i32 0, i32 16}
+
+define i32 @abs_
diff (i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff (
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %x, %y
+ %cmp = icmp sgt i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _neg_no_nsw_neg(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _neg_no_nsw_neg(
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], [[Y]]
+; CHECK-NEXT: [[SUB1:%.*]] = sub i32 0, [[SUB]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[SUB1]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub i32 %x, %y
+ %cmp = icmp sgt i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _neg(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _neg(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], [[Y]]
+; CHECK-NEXT: [[SUB1:%.*]] = sub i32 0, [[SUB]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[SUB1]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %y, %x
+ %cmp = icmp sgt i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _neg_no_nsw(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _neg_no_nsw(
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], [[Y]]
+; CHECK-NEXT: [[SUB1:%.*]] = sub i32 0, [[SUB]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[SUB1]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub i32 %y, %x
+ %cmp = icmp sgt i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _ge(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _ge(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %x, %y
+ %cmp = icmp sge i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _slt_commute(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _slt_commute(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %x, %y
+ %cmp = icmp slt i32 %y, %x
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _sge_same(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _sge_same(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %x, %y
+ %cmp = icmp sge i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _sle_inverted(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _sle_inverted(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %x, %y
+ %cmp = icmp sle i32 %x, %y
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub1, i32 %sub
+ ret i32 %cond
+}
+
+define i32 @abs_
diff _sle_commute(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_
diff _sle_commute(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 %x, %y
+ %cmp = icmp sle i32 %y, %x
+ %sub1 = sub i32 0, %sub
+ %cond = select i1 %cmp, i32 %sub, i32 %sub1
+ ret i32 %cond
+}
+
+define i8 @abs_
diff _sle_y_x(i8 %x, i8 %y) {
+; CHECK-LABEL: @abs_
diff _sle_y_x(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = call i8 @llvm.abs.i8(i8 [[SUB]], i1 false)
+; CHECK-NEXT: ret i8 [[COND]]
+;
+ %sub = sub nsw i8 %x, %y
+ %cmp = icmp sle i8 %y, %x
+ %sub1 = sub i8 0, %sub
+ %cond = select i1 %cmp, i8 %sub, i8 %sub1
+ ret i8 %cond
+}
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