[llvm] ad9d551 - [Mips] Remove `size` operand of LwRxPcTcp16 / LwRxPcTcpX16 (#157348)

via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 13 19:56:56 PDT 2025


Author: Sergei Barannikov
Date: 2025-09-14T10:56:51+08:00
New Revision: ad9d551e5568e155005e569a0c9527b6e45c92b8

URL: https://github.com/llvm/llvm-project/commit/ad9d551e5568e155005e569a0c9527b6e45c92b8
DIFF: https://github.com/llvm/llvm-project/commit/ad9d551e5568e155005e569a0c9527b6e45c92b8.diff

LOG: [Mips] Remove `size` operand of LwRxPcTcp16 / LwRxPcTcpX16 (#157348)

There is no such operand on LW instructions. It is neither encoded nor
printed, and was only inserted by MipsConstantIslands pass but never
used after that.

Added: 
    

Modified: 
    llvm/lib/Target/Mips/Mips16InstrInfo.td
    llvm/lib/Target/Mips/MipsConstantIslandPass.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/Mips16InstrInfo.td b/llvm/lib/Target/Mips/Mips16InstrInfo.td
index ab473c133b8e3..296414c6a06db 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.td
@@ -88,7 +88,7 @@ class FRI16_ins<bits<5> op, string asmstr,
 
 class FRI16_TCP_ins<bits<5> _op, string asmstr,
                     InstrItinClass itin>:
-  FRI16<_op, (outs CPU16Regs:$rx), (ins pcrel16:$imm8, i32imm:$size),
+  FRI16<_op, (outs CPU16Regs:$rx), (ins pcrel16:$imm8),
             !strconcat(asmstr, "\t$rx, $imm8\t# 16 bit inst"), [], itin>;
 
 class FRI16R_ins_base<bits<5> op, string asmstr, string asmstr2,
@@ -216,7 +216,7 @@ class FEXT_RI16_B_ins<bits<5> _op, string asmstr,
 
 class FEXT_RI16_TCP_ins<bits<5> _op, string asmstr,
                         InstrItinClass itin>:
-  FEXT_RI16<_op, (outs CPU16Regs:$rx), (ins pcrel16:$imm16, i32imm:$size),
+  FEXT_RI16<_op, (outs CPU16Regs:$rx), (ins pcrel16:$imm16),
             !strconcat(asmstr, "\t$rx, $imm16"), [], itin>;
 
 class FEXT_2RI16_ins<bits<5> _op, string asmstr,
@@ -856,6 +856,7 @@ def LwRxSpImmX16: FEXT_RRI16_mem_ins<0b10010, "lw", mem16sp, II_LW>, MayLoad;
 def LwRxPcTcp16: FRI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
 
 def LwRxPcTcpX16: FEXT_RI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
+
 //
 // Format: MOVE r32, rz MIPS16e
 // Purpose: Move

diff  --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
index 8699807b6bf2b..31a229a0fd102 100644
--- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
+++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
@@ -1647,7 +1647,6 @@ void MipsConstantIslands::prescanForConstants() {
           MI.removeOperand(1);
           MI.removeOperand(1);
           MI.addOperand(MachineOperand::CreateCPI(index, 0));
-          MI.addOperand(MachineOperand::CreateImm(4));
         }
         break;
       }


        


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