[llvm] 1dc4db8 - AMDGPU: Relax verifier for agpr/vgpr loads and stores (#158391)

[via llvm-commits]

Author: Matt Arsenault
Date: 2025-09-13T16:34:02+09:00
New Revision: 1dc4db8f1ec535adc663d781f9f3a39f78d78256

URL: https://github.com/llvm/llvm-project/commit/1dc4db8f1ec535adc663d781f9f3a39f78d78256
DIFF: https://github.com/llvm/llvm-project/commit/1dc4db8f1ec535adc663d781f9f3a39f78d78256.diff

LOG: AMDGPU: Relax verifier for agpr/vgpr loads and stores (#158391)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 0361868e2c1e8..70223da961e92 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5590,7 +5590,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
       Data = nullptr;
 
     if (ST.hasGFX90AInsts()) {
-      if (Dst && Data &&
+      if (Dst && Data && !Dst->isTied() && !Data->isTied() &&
           (RI.isAGPR(MRI, Dst->getReg()) != RI.isAGPR(MRI, Data->getReg()))) {
         ErrInfo = "Invalid register class: "
                   "vdata and vdst should be both VGPR or AGPR";