[llvm] AMDGPU: Relax verifier for agpr/vgpr loads and stores (PR #158391)
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Fri Sep 12 18:10:16 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.
Fixes expensive_checks failures.
---
Full diff: https://github.com/llvm/llvm-project/pull/158391.diff
1 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.cpp (+1-1)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 0361868e2c1e8..70223da961e92 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5590,7 +5590,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
Data = nullptr;
if (ST.hasGFX90AInsts()) {
- if (Dst && Data &&
+ if (Dst && Data && !Dst->isTied() && !Data->isTied() &&
(RI.isAGPR(MRI, Dst->getReg()) != RI.isAGPR(MRI, Data->getReg()))) {
ErrInfo = "Invalid register class: "
"vdata and vdst should be both VGPR or AGPR";
``````````
</details>
https://github.com/llvm/llvm-project/pull/158391
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