[llvm] AMDGPU: Relax verifier for agpr/vgpr loads and stores (PR #158391)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/158391

Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.

Fixes expensive_checks failures.

>From 0ef56d9f24e7d7d8e39e3a79a6f0e9a437a310e1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Sat, 13 Sep 2025 10:07:39 +0900
Subject: [PATCH] AMDGPU: Relax verifier for agpr/vgpr loads and stores

Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.

Fixes expensive_checks failures.
---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 0361868e2c1e8..70223da961e92 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5590,7 +5590,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
       Data = nullptr;
 
     if (ST.hasGFX90AInsts()) {
-      if (Dst && Data &&
+      if (Dst && Data && !Dst->isTied() && !Data->isTied() &&
           (RI.isAGPR(MRI, Dst->getReg()) != RI.isAGPR(MRI, Data->getReg()))) {
         ErrInfo = "Invalid register class: "
                   "vdata and vdst should be both VGPR or AGPR";