[llvm] unpack packed instructions overlapped by MFMAs post-RA scheduling (PR #157968)
Jeffrey Byrnes via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 12 14:24:55 PDT 2025
================
@@ -435,6 +735,28 @@ bool SIPreEmitPeephole::run(MachineFunction &MF) {
MF.RenumberBlocks();
for (MachineBasicBlock &MBB : MF) {
+ // Unpack packed instructions overlapped by MFMAs. This allows the compiler
+ // to co-issue unpacked instructions with MFMA
+ uint16_t NumMFMACycles = 0;
+ auto SchedModel = TII->getSchedModel();
+ SetVector<MachineInstr *> InstrsToUnpack;
+ for (auto &MI : make_early_inc_range(MBB.instrs())) {
+ if (SIInstrInfo::isMFMA(MI)) {
+ const MCSchedClassDesc *SchedClassDesc =
+ SchedModel.resolveSchedClass(&MI);
+ NumMFMACycles =
+ SchedModel.getWriteProcResBegin(SchedClassDesc)->ReleaseAtCycle;
+ collectUnpackingCandidates(MI, InstrsToUnpack, NumMFMACycles);
+ }
+ }
+ if (!InstrsToUnpack.empty()) {
+ for (MachineInstr *MI : InstrsToUnpack) {
+ if (!SIInstrInfo::modifiesModeRegister(*MI) &&
+ !MI->modifiesRegister(AMDGPU::EXEC, TRI))
+ performF32Unpacking(*MI);
----------------
jrbyrnes wrote:
Are there cases where this interacts with branch optimization logic below?
https://github.com/llvm/llvm-project/pull/157968
More information about the llvm-commits
mailing list