[llvm] [ARM] Replace ABS and tABS machine nodes with custom lowering (PR #156717)

[David Green via llvm-commits]

davemgreen wrote:

> Don't all ALU instructions on arm with a few exceptions cost the same?

My understanding is that is depends on the cpu. Most will perform the `sub r0, r1, r2` in a single cycles for example, but `sub r0, r1, r2, asr 31` will take 2. You can see some examples in, for example llvm/test/tools/llvm-mca/ARM/m55-int.s, but I'm not sure how accurate they all are. The with-shift instructions are also larger t2 instructions as opposed to 16bit T1 instructions, but I'm not sure how well we model that at the moment. There is some details on A-profile cores in the relevant software optimization guides.

https://github.com/llvm/llvm-project/pull/156717