[llvm] [AMDGPU][NFC] Refactor FLAT_Global_* pseudos. (PR #120244)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 12 09:30:57 PDT 2025
================
@@ -833,99 +829,82 @@ multiclass FLAT_Atomic_Pseudo<
defm "" : FLAT_Atomic_Pseudo_RTN<opName, vdst_op, vt, data_vt, data_op>;
}
-multiclass FLAT_Global_Atomic_Pseudo_NO_RTN<
+class FLAT_Global_Atomic_Pseudo_NO_RTN<
string opName,
RegisterOperand vdst_op,
ValueType vt,
ValueType data_vt = vt,
- RegisterOperand data_op = vdst_op> {
-
- let is_flat_global = 1 in {
- def "" : FLAT_AtomicNoRet_Pseudo <opName,
- (outs),
- (ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_0:$cpol),
- " $vaddr, $vdata, off$offset$cpol">,
- GlobalSaddrTable<0, opName> {
- let has_saddr = 1;
- let FPAtomic = data_vt.isFP;
- }
-
- def _SADDR : FLAT_AtomicNoRet_Pseudo <opName,
- (outs),
- (ins VGPR_32:$vaddr, data_op:$vdata, SReg_64_XEXEC_XNULL:$saddr, flat_offset:$offset, CPol_0:$cpol),
- " $vaddr, $vdata, $saddr$offset$cpol">,
- GlobalSaddrTable<1, opName> {
- let has_saddr = 1;
- let enabled_saddr = 1;
- let FPAtomic = data_vt.isFP;
- }
- }
+ RegisterOperand data_op = vdst_op,
+ bit EnableSaddr = 0,
+ RegisterClass VaddrRC = !if(EnableSaddr, VGPR_32, VReg_64)>
+ : FLAT_AtomicNoRet_Pseudo<opName, (outs), (ins), "">, GlobalSaddrTable<EnableSaddr, opName> {
+ let InOperandList = !con(
+ (ins VaddrRC:$vaddr, data_op:$vdata), !if(EnableSaddr, (ins SReg_64_XEXEC_XNULL:$saddr), (ins)),
----------------
sstipano wrote:
This is kind of a counter example of the previous comment. In this case, if we were to have ins indented to the same level, first ins' indentation would seem wrong to me.
https://github.com/llvm/llvm-project/pull/120244
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