[llvm] unpack packed instructions overlapped by MFMAs post-RA scheduling (PR #157968)
Jan Patrick Lehr via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 11 07:14:32 PDT 2025
================
@@ -417,6 +455,233 @@ bool SIPreEmitPeephole::removeExeczBranch(MachineInstr &MI,
return true;
}
+bool SIPreEmitPeephole::isUnpackingSupportedInstr(MachineInstr &MI) const {
+ unsigned Opcode = MI.getOpcode();
+ switch (Opcode) {
+ case AMDGPU::V_PK_ADD_F32:
+ case AMDGPU::V_PK_MUL_F32:
+ case AMDGPU::V_PK_FMA_F32:
+ return true;
+ default:
+ return false;
+ }
+ llvm_unreachable("Fully covered switch");
+}
+
+bool SIPreEmitPeephole::hasReadWriteDependencies(const MachineInstr &PredMI,
+ const MachineInstr &SuccMI) {
+ for (const MachineOperand &Pred_Ops : PredMI.operands()) {
+ if (!Pred_Ops.isReg() || !Pred_Ops.isDef())
+ continue;
+ Register Pred_Reg = Pred_Ops.getReg();
+ if (!Pred_Reg.isValid())
+ continue;
+ for (const MachineOperand &Succ_Ops : SuccMI.operands()) {
+ if (!Succ_Ops.isReg() || !Succ_Ops.isDef())
+ continue;
+ Register Succ_Reg = Succ_Ops.getReg();
+ if (!Succ_Reg.isValid())
+ continue;
+ if ((Pred_Reg == Succ_Reg) || TRI->regsOverlap(Pred_Reg, Succ_Reg)) {
+ return true;
+ }
----------------
jplehr wrote:
```suggestion
if ((Pred_Reg == Succ_Reg) || TRI->regsOverlap(Pred_Reg, Succ_Reg))
return true;
```
https://github.com/llvm/llvm-project/pull/157968
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