[clang] [llvm] [mlir] [AMDGPU] [ROCDL] Added Intrinsics for smed, umed, to support ISA instructions from ROCDL (PR #157748)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm requested changes to this pull request.

It is not necessary to add new intrinsics for these operations. You are better off writing the med3 in terms of min and max and letting the backend deal with it. The effort of fully supporting all analyses and optimizations on a new operation is very high

https://github.com/llvm/llvm-project/pull/157748