[llvm] [X86] Standardize (V)AESKEYGENASSIST instruction naming (PR #158046)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

<details>
<summary>Changes</summary>

Remove unnecessary 128 postfix

Add missing immediate to the signature (e.g. AESKEYGENASSISTrr -> AESKEYGENASSISTrri).

Makes it easier for downstream scripts to determine the instruction name from the assembly without overrides

---
Full diff: https://github.com/llvm/llvm-project/pull/158046.diff


3 Files Affected:

- (modified) llvm/lib/Target/X86/X86InstrSSE.td (+4-4) 
- (modified) llvm/test/TableGen/x86-fold-tables.inc (+2-2) 
- (modified) llvm/test/TableGen/x86-instr-mapping.inc (+2-2) 


``````````diff
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index b7926497c92ba..806b02b9f9359 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -6898,26 +6898,26 @@ def AESIMCrm : AES8I<0xDB, MRMSrcMem, (outs VR128:$dst),
 
 // AES Round Key Generation Assist
 let Predicates = [HasAVX, HasAES] in {
-  def VAESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
+  def VAESKEYGENASSISTrri : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
       (ins VR128:$src1, u8imm:$src2),
       "vaeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
       [(set VR128:$dst,
         (int_x86_aesni_aeskeygenassist VR128:$src1, timm:$src2))]>,
       Sched<[WriteAESKeyGen]>, VEX, WIG;
-  def VAESKEYGENASSIST128rm : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
+  def VAESKEYGENASSISTrmi : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
       (ins i128mem:$src1, u8imm:$src2),
       "vaeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
       [(set VR128:$dst,
         (int_x86_aesni_aeskeygenassist (load addr:$src1), timm:$src2))]>,
       Sched<[WriteAESKeyGen.Folded]>, VEX, WIG;
 }
-def AESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
+def AESKEYGENASSISTrri : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
   (ins VR128:$src1, u8imm:$src2),
   "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
   [(set VR128:$dst,
     (int_x86_aesni_aeskeygenassist VR128:$src1, timm:$src2))]>,
   Sched<[WriteAESKeyGen]>;
-def AESKEYGENASSIST128rm : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
+def AESKEYGENASSISTrmi : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
   (ins i128mem:$src1, u8imm:$src2),
   "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
   [(set VR128:$dst,
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 5601aebdf0426..bafc98a69ddae 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -621,7 +621,7 @@ static const X86FoldTableEntry Table1[] = {
   {X86::ADD8rr_ND, X86::ADD8mr_ND, 0},
   {X86::ADD8rr_NF_ND, X86::ADD8mr_NF_ND, 0},
   {X86::AESIMCrr, X86::AESIMCrm, TB_ALIGN_16},
-  {X86::AESKEYGENASSIST128rr, X86::AESKEYGENASSIST128rm, TB_ALIGN_16},
+  {X86::AESKEYGENASSISTrri, X86::AESKEYGENASSISTrmi, TB_ALIGN_16},
   {X86::AND16ri8_ND, X86::AND16mi8_ND, 0},
   {X86::AND16ri8_NF_ND, X86::AND16mi8_NF_ND, 0},
   {X86::AND16ri_ND, X86::AND16mi_ND, 0},
@@ -1146,7 +1146,7 @@ static const X86FoldTableEntry Table1[] = {
   {X86::UCOMISSrr, X86::UCOMISSrm, 0},
   {X86::UCOMISSrr_Int, X86::UCOMISSrm_Int, TB_NO_REVERSE},
   {X86::VAESIMCrr, X86::VAESIMCrm, 0},
-  {X86::VAESKEYGENASSIST128rr, X86::VAESKEYGENASSIST128rm, 0},
+  {X86::VAESKEYGENASSISTrri, X86::VAESKEYGENASSISTrmi, 0},
   {X86::VBROADCASTF32X2Z256rr, X86::VBROADCASTF32X2Z256rm, TB_NO_REVERSE},
   {X86::VBROADCASTF32X2Zrr, X86::VBROADCASTF32X2Zrm, TB_NO_REVERSE},
   {X86::VBROADCASTI32X2Z128rr, X86::VBROADCASTI32X2Z128rm, TB_NO_REVERSE},
diff --git a/llvm/test/TableGen/x86-instr-mapping.inc b/llvm/test/TableGen/x86-instr-mapping.inc
index 5cf5417c0911d..f621979b2af95 100644
--- a/llvm/test/TableGen/x86-instr-mapping.inc
+++ b/llvm/test/TableGen/x86-instr-mapping.inc
@@ -2713,8 +2713,8 @@ static const X86TableEntry X86SSE2AVXTable[] = {
   { X86::AESENCrr, X86::VAESENCrr },
   { X86::AESIMCrm, X86::VAESIMCrm },
   { X86::AESIMCrr, X86::VAESIMCrr },
-  { X86::AESKEYGENASSIST128rm, X86::VAESKEYGENASSIST128rm },
-  { X86::AESKEYGENASSIST128rr, X86::VAESKEYGENASSIST128rr },
+  { X86::AESKEYGENASSISTrmi, X86::VAESKEYGENASSISTrmi },
+  { X86::AESKEYGENASSISTrri, X86::VAESKEYGENASSISTrri },
   { X86::ANDNPDrm, X86::VANDNPDrm },
   { X86::ANDNPDrr, X86::VANDNPDrr },
   { X86::ANDNPSrm, X86::VANDNPSrm },

``````````

</details>


https://github.com/llvm/llvm-project/pull/158046