[llvm] [InstSimplify] Simplify get.active.lane.mask when 2nd arg is zero (PR #158018)

[David Sherwood via llvm-commits]

https://github.com/david-arm created https://github.com/llvm/llvm-project/pull/158018

When the second argument passed to the get.active.lane.mask intrinsic is zero we can simplify the instruction to return an all-false mask regardless of the first operand.

>From 708c7d7b61b2081f993651e737be059d730dbf7f Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Thu, 11 Sep 2025 08:55:34 +0000
Subject: [PATCH] [InstSimplify] Simplify get.active.lane.mask when 2nd arg is
 zero

When the second argument passed to the get.active.lane.mask
intrinsic is zero we can simplify the instruction to return
an all-false mask.
---
 llvm/lib/Analysis/InstructionSimplify.cpp     |  4 ++++
 .../InstSimplify/get_active_lane_mask.ll      | 20 +++++++++++++++++++
 2 files changed, 24 insertions(+)
 create mode 100644 llvm/test/Transforms/InstSimplify/get_active_lane_mask.ll

diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index ebe329aa1d5fe..7bff13d59528c 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -6474,6 +6474,10 @@ Value *llvm::simplifyBinaryIntrinsic(Intrinsic::ID IID, Type *ReturnType,
                                      const CallBase *Call) {
   unsigned BitWidth = ReturnType->getScalarSizeInBits();
   switch (IID) {
+  case Intrinsic::get_active_lane_mask:
+    if (match(Op1, m_Zero()))
+      return ConstantInt::getFalse(ReturnType);
+    break;
   case Intrinsic::abs:
     // abs(abs(x)) -> abs(x). We don't need to worry about the nsw arg here.
     // It is always ok to pick the earlier abs. We'll just lose nsw if its only
diff --git a/llvm/test/Transforms/InstSimplify/get_active_lane_mask.ll b/llvm/test/Transforms/InstSimplify/get_active_lane_mask.ll
new file mode 100644
index 0000000000000..a3b8e4efbe939
--- /dev/null
+++ b/llvm/test/Transforms/InstSimplify/get_active_lane_mask.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=instsimplify,verify -S | FileCheck %s
+
+define <4 x i1> @foo_v4i1(i32 %a) {
+; CHECK-LABEL: define <4 x i1> @foo_v4i1(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT:    ret <4 x i1> zeroinitializer
+;
+  %mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1(i32 %a, i32 0)
+  ret <4 x i1> %mask
+}
+
+define <vscale x 8 x i1> @foo_nxv8i1(i32 %a) {
+; CHECK-LABEL: define <vscale x 8 x i1> @foo_nxv8i1(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT:    ret <vscale x 8 x i1> zeroinitializer
+;
+  %mask = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1(i32 %a, i32 0)
+  ret <vscale x 8 x i1> %mask
+}