[llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)

[John Brawn via llvm-commits]

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@@ -174,16 +173,34 @@ attributes #0 = { "target-cpu"="knl" }
 define void @PR40816() #1 {
 ; CHECK-LABEL: define void @PR40816(
 ; CHECK-SAME: ) #[[ATTR1:[0-9]+]] {
-; CHECK-NEXT:  [[ENTRY:.*]]:
-; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
-; CHECK:       [[FOR_BODY]]:
-; CHECK-NEXT:    [[TMP0:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[INC:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT:    store i32 [[TMP0]], ptr @b, align 1
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[TMP0]], 2
-; CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[TMP0]], 1
-; CHECK-NEXT:    br i1 [[CMP2]], label %[[RETURN:.*]], label %[[FOR_BODY]]
-; CHECK:       [[RETURN]]:
-; CHECK-NEXT:    ret void
+; CHECK-NEXT:  [[ENTRY:.*:]]
----------------
john-brawn-arm wrote:

All of the control flow here is using constant conditions (because we know the trip count is 3 so we know which lanes need to be stored) so after simplifycfg we get
```
define void @PR40816() #1 {
entry:
  store i32 0, ptr @b, align 1
  store i32 1, ptr @b, align 1
  store i32 2, ptr @b, align 1
  ret void
}
```
Though if I modify this test a little so that the trip count is 7 (make array ``@a`` larger) then we still vectorize but don't get constant conditions for the branches and so it is worse. I'll look into this.

https://github.com/llvm/llvm-project/pull/156864