[llvm] AMDGPU/GlobalISel: Add regbanklegalize rules for load and store (PR #153176)

[Pierre van Houtryve via llvm-commits]

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@@ -352,6 +352,31 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, LLT WideTy,
   MI.eraseFromParent();
 }
 
+void RegBankLegalizeHelper::widenMMOToS32(GAnyLoad &MI) const {
+  Register Dst = MI.getDstReg();
+  Register Ptr = MI.getPointerReg();
+  MachineMemOperand &MMO = MI.getMMO();
+  unsigned MemSize = 8 * MMO.getSize().getValue();
+
+  MachineMemOperand *WideMMO = B.getMF().getMachineMemOperand(&MMO, 0, S32);
+
+  if (MI.getOpcode() == G_LOAD) {
+    B.buildLoad(Dst, Ptr, *WideMMO);
+  } else {
+    auto Load = B.buildLoad(SgprRB_S32, Ptr, *WideMMO);
+
+    if (MI.getOpcode() == G_ZEXTLOAD) {
+      APInt Mask = APInt::getLowBitsSet(S32.getSizeInBits(), MemSize);
+      auto MaskCst = B.buildConstant(SgprRB_S32, Mask);
+      B.buildAnd(Dst, Load, MaskCst);
+    } else {
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Pierre-vh wrote:

nit: add assert that this is indeed a SEXTLOAD, just in case new load variants pop up someday.

https://github.com/llvm/llvm-project/pull/153176