[clang] [llvm] [RISCV] Enabled debug entry support by default (PR #157703)

[Georgiy Samoylov via llvm-commits]

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@@ -0,0 +1,74 @@
+;; Test RISC-V 64 bit:
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sga-sc wrote:

Added test for 32 bit RISC-V

https://github.com/llvm/llvm-project/pull/157703