[llvm] [NFC][GlobalISel] Pass `APInt` by const reference (PR #157827)
Abhishek Kaushik via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 10 04:10:41 PDT 2025
https://github.com/abhishek-kaushik22 updated https://github.com/llvm/llvm-project/pull/157827
>From 74f38e5257159998b9a8617b23b8519e1df5dc9a Mon Sep 17 00:00:00 2001
From: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: Wed, 10 Sep 2025 16:38:55 +0530
Subject: [PATCH] [NFC][GlobalISel] Pass APInt by const reference
---
llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h | 2 +-
llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 6 ++++--
llvm/lib/CodeGen/GlobalISel/Utils.cpp | 6 ++++--
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
index 827cdbdb23c51..b7ccfbb27e51c 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
@@ -193,7 +193,7 @@ m_GFCstOrSplat(std::optional<FPValueAndVReg> &FPValReg) {
/// Matcher for a specific constant value.
struct SpecificConstantMatch {
APInt RequestedVal;
- SpecificConstantMatch(const APInt RequestedVal)
+ SpecificConstantMatch(const APInt &RequestedVal)
: RequestedVal(RequestedVal) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
APInt MatchedVal;
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
index 5c27605c26883..e1aa8eceefd3f 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
@@ -463,7 +463,8 @@ LLVM_ABI bool isBuildVectorConstantSplat(const Register Reg,
/// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
LLVM_ABI bool isBuildVectorConstantSplat(const Register Reg,
const MachineRegisterInfo &MRI,
- APInt SplatValue, bool AllowUndef);
+ const APInt &SplatValue,
+ bool AllowUndef);
/// Return true if the specified instruction is a G_BUILD_VECTOR or
/// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
@@ -475,7 +476,8 @@ LLVM_ABI bool isBuildVectorConstantSplat(const MachineInstr &MI,
/// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
LLVM_ABI bool isBuildVectorConstantSplat(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
- APInt SplatValue, bool AllowUndef);
+ const APInt &SplatValue,
+ bool AllowUndef);
/// Return true if the specified instruction is a G_BUILD_VECTOR or
/// G_BUILD_VECTOR_TRUNC where all of the elements are 0 or undef.
diff --git a/llvm/lib/CodeGen/GlobalISel/Utils.cpp b/llvm/lib/CodeGen/GlobalISel/Utils.cpp
index 58d631e569b3a..18c363a652414 100644
--- a/llvm/lib/CodeGen/GlobalISel/Utils.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/Utils.cpp
@@ -1409,7 +1409,8 @@ bool llvm::isBuildVectorConstantSplat(const Register Reg,
bool llvm::isBuildVectorConstantSplat(const Register Reg,
const MachineRegisterInfo &MRI,
- APInt SplatValue, bool AllowUndef) {
+ const APInt &SplatValue,
+ bool AllowUndef) {
if (auto SplatValAndReg = getAnyConstantSplat(Reg, MRI, AllowUndef)) {
if (SplatValAndReg->Value.getBitWidth() < SplatValue.getBitWidth())
return APInt::isSameValue(
@@ -1431,7 +1432,8 @@ bool llvm::isBuildVectorConstantSplat(const MachineInstr &MI,
bool llvm::isBuildVectorConstantSplat(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
- APInt SplatValue, bool AllowUndef) {
+ const APInt &SplatValue,
+ bool AllowUndef) {
return isBuildVectorConstantSplat(MI.getOperand(0).getReg(), MRI, SplatValue,
AllowUndef);
}
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