[llvm] [RISCV][GISel] Lower G_SADDE (PR #156865)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 9 19:49:47 PDT 2025
https://github.com/woruyu updated https://github.com/llvm/llvm-project/pull/156865
>From eb8164521ce9bb16ca390cba08f2afb0a107badc Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Thu, 4 Sep 2025 19:47:43 +0800
Subject: [PATCH 1/5] [RISCV][GISel] Lower G_SADDE
---
.../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 +
.../CodeGen/GlobalISel/LegalizerHelper.cpp | 36 +++
.../Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 2 +-
.../GlobalISel/legalizer-info-validation.mir | 5 +-
.../legalizer/legalize-sadde-rv32.mir | 179 +++++++++++++++
.../legalizer/legalize-sadde-rv64.mir | 217 ++++++++++++++++++
6 files changed, 437 insertions(+), 3 deletions(-)
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
index 3be4f82d11bbf..feb446291caf7 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
@@ -510,6 +510,7 @@ class LegalizerHelper {
LLVM_ABI LegalizeResult lowerExtract(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerInsert(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI);
+ LLVM_ABI LegalizeResult lowerSADDE(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerAddSubSatToMinMax(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerAddSubSatToAddoSubo(MachineInstr &MI);
LLVM_ABI LegalizeResult lowerShlSat(MachineInstr &MI);
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index a38d305a8bb52..d10ce1feaba6e 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4447,6 +4447,8 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
case TargetOpcode::G_SADDO:
case TargetOpcode::G_SSUBO:
return lowerSADDO_SSUBO(MI);
+ case TargetOpcode::G_SADDE:
+ return lowerSADDE(MI);
case TargetOpcode::G_UMULH:
case TargetOpcode::G_SMULH:
return lowerSMULH_UMULH(MI);
@@ -9298,6 +9300,40 @@ LegalizerHelper::lowerSADDO_SSUBO(MachineInstr &MI) {
return Legalized;
}
+LegalizerHelper::LegalizeResult LegalizerHelper::lowerSADDE(MachineInstr &MI) {
+ auto [Res, OvOut, LHS, RHS, CarryIn] = MI.getFirst5Regs();
+ const LLT Ty = MRI.getType(Res);
+ const LLT BoolTy = MRI.getType(OvOut);
+
+ Register NewRes = MRI.cloneVirtualRegister(Res);
+
+ // Step 1: tmp = LHS + RHS
+ auto Tmp = MIRBuilder.buildAdd(Ty, LHS, RHS);
+
+ // ov0 = (tmp < lhs) XOR (rhs < 0)
+ auto TmpLtLHS = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, Tmp, LHS);
+ auto Zero = MIRBuilder.buildConstant(Ty, 0);
+ auto RHSLt0 = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, RHS, Zero);
+ auto Ov0 = MIRBuilder.buildXor(BoolTy, TmpLtLHS, RHSLt0);
+
+ // Step 2: sum = tmp + zext(CarryIn)
+ auto CarryInZ = MIRBuilder.buildZExt(Ty, CarryIn);
+ MIRBuilder.buildAdd(NewRes, Tmp, CarryInZ);
+
+ // ov1 = CarryIn & (sum < tmp)
+ auto SumLtTmp = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, NewRes, Tmp);
+ auto Ov1 = MIRBuilder.buildAnd(BoolTy, SumLtTmp, CarryIn);
+
+ // ov = ov0 | ov1
+ auto Ov = MIRBuilder.buildOr(BoolTy, Ov0, Ov1);
+
+ MIRBuilder.buildCopy(OvOut, Ov);
+ MIRBuilder.buildCopy(Res, NewRes);
+
+ MI.eraseFromParent();
+ return Legalized;
+}
+
LegalizerHelper::LegalizeResult
LegalizerHelper::lowerAddSubSatToMinMax(MachineInstr &MI) {
auto [Res, LHS, RHS] = MI.getFirst3Regs();
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index ab5c9e17b9a37..5bed202b38e46 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -151,7 +151,7 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
getActionDefinitionsBuilder(
{G_UADDE, G_UADDO, G_USUBE, G_USUBO}).lower();
- getActionDefinitionsBuilder({G_SADDO, G_SSUBO}).minScalar(0, sXLen).lower();
+ getActionDefinitionsBuilder({G_SADDO,G_SADDE, G_SSUBO}).minScalar(0, sXLen).lower();
// TODO: Use Vector Single-Width Saturating Instructions for vector types.
getActionDefinitionsBuilder(
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
index 562adbd2ce3a7..236ff553e666a 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
@@ -407,8 +407,9 @@
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_SADDE (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_SSUBO (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
new file mode 100644
index 0000000000000..7729cc6e8c76e
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
@@ -0,0 +1,179 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name: sadde_i8
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i8
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[ASHR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[COPY3]](s32), [[ASHR2]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s32) = COPY $x10
+ %1:_(s8) = G_TRUNC %0(s32)
+ %2:_(s32) = COPY $x11
+ %3:_(s8) = G_TRUNC %2(s32)
+ %4:_(s32) = COPY $x12
+ %5:_(s1) = G_TRUNC %4(s32)
+ %6:_(s8), %7:_(s1) = G_SADDE %1, %3, %5
+ %8:_(s32) = G_ANYEXT %6(s8)
+ %9:_(s32) = G_ANYEXT %7(s1)
+ $x10 = COPY %8(s32)
+ $x11 = COPY %9(s32)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i16
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i16
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[ASHR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[COPY3]](s32), [[ASHR2]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s32) = COPY $x10
+ %1:_(s16) = G_TRUNC %0(s32)
+ %2:_(s32) = COPY $x11
+ %3:_(s16) = G_TRUNC %2(s32)
+ %4:_(s32) = COPY $x12
+ %5:_(s1) = G_TRUNC %4(s32)
+ %6:_(s16), %7:_(s1) = G_SADDE %1, %3, %5
+ %8:_(s32) = G_ANYEXT %6(s16)
+ %9:_(s32) = G_ANYEXT %7(s1)
+ $x10 = COPY %8(s32)
+ $x11 = COPY %9(s32)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i32
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i32
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD]](s32), [[COPY]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY1]](s32), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD1]](s32), [[ADD]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[COPY2]]
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[AND1]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[OR]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s32) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s32) = COPY $x12
+ %3:_(s1) = G_TRUNC %2(s32)
+ %4:_(s32), %5:_(s1) = G_SADDE %0, %1, %3
+ %6:_(s32) = G_ANYEXT %5(s1)
+ $x10 = COPY %4(s32)
+ $x11 = COPY %6(s32)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i64
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12, $x13, $x14
+
+ ; CHECK-LABEL: name: sadde_i64
+ ; CHECK: liveins: $x10, $x11, $x12, $x13, $x14
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY2]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD]](s32), [[COPY]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY2]](s32), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD1]](s32), [[ADD]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[COPY4]]
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[AND1]]
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY3]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD2]](s32), [[COPY1]]
+ ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY3]](s32), [[C]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ICMP3]], [[ICMP4]]
+ ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD2]], [[OR]]
+ ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD3]](s32), [[ADD2]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP5]], [[OR]]
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[XOR1]], [[AND2]]
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ADD3]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[COPY5]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[COPY6]](s32)
+ ; CHECK-NEXT: $x12 = COPY [[OR1]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %0:_(s32) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s32) = COPY $x12
+ %3:_(s32) = COPY $x13
+ %4:_(s32) = COPY $x14
+ %5:_(s1) = G_TRUNC %4(s32)
+ %6:_(s32), %7:_(s1) = G_SADDE %0, %2, %5
+ %8:_(s32), %9:_(s1) = G_SADDE %1, %3, %7
+ %10:_(s32) = G_ANYEXT %9(s1)
+ $x10 = COPY %6(s32)
+ $x11 = COPY %8(s32)
+ $x12 = COPY %10(s32)
+
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
new file mode 100644
index 0000000000000..70b5c144f3871
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
@@ -0,0 +1,217 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name: sadde_i8
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i8
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C]](s64)
+ ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C]](s64)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ASHR]], [[ASHR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[COPY3]], [[C]](s64)
+ ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[SHL2]], [[C]](s64)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ne), [[COPY3]](s64), [[ASHR2]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s64) = COPY $x10
+ %1:_(s8) = G_TRUNC %0(s64)
+ %2:_(s64) = COPY $x11
+ %3:_(s8) = G_TRUNC %2(s64)
+ %4:_(s64) = COPY $x12
+ %5:_(s1) = G_TRUNC %4(s64)
+ %6:_(s8), %7:_(s1) = G_SADDE %1, %3, %5
+ %8:_(s64) = G_ANYEXT %6(s8)
+ %9:_(s64) = G_ANYEXT %7(s1)
+ $x10 = COPY %8(s64)
+ $x11 = COPY %9(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i16
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i16
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C]](s64)
+ ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C]](s64)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ASHR]], [[ASHR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[COPY3]], [[C]](s64)
+ ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[SHL2]], [[C]](s64)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ne), [[COPY3]](s64), [[ASHR2]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s64) = COPY $x10
+ %1:_(s16) = G_TRUNC %0(s64)
+ %2:_(s64) = COPY $x11
+ %3:_(s16) = G_TRUNC %2(s64)
+ %4:_(s64) = COPY $x12
+ %5:_(s1) = G_TRUNC %4(s64)
+ %6:_(s16), %7:_(s1) = G_SADDE %1, %3, %5
+ %8:_(s64) = G_ANYEXT %6(s16)
+ %9:_(s64) = G_ANYEXT %7(s1)
+ $x10 = COPY %8(s64)
+ $x11 = COPY %9(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i32
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i32
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32
+ ; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: [[SEXT_INREG2:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY3]], 32
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ne), [[COPY3]](s64), [[SEXT_INREG2]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_TRUNC %0(s64)
+ %2:_(s64) = COPY $x11
+ %3:_(s32) = G_TRUNC %2(s64)
+ %4:_(s64) = COPY $x12
+ %5:_(s1) = G_TRUNC %4(s64)
+ %6:_(s32), %7:_(s1) = G_SADDE %1, %3, %5
+ %8:_(s64) = G_ANYEXT %6(s32)
+ %9:_(s64) = G_ANYEXT %7(s1)
+ $x10 = COPY %8(s64)
+ $x11 = COPY %9(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i64
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12
+
+ ; CHECK-LABEL: name: sadde_i64
+ ; CHECK: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD]](s64), [[COPY]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY1]](s64), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD1]](s64), [[ADD]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[COPY2]]
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[AND1]]
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[OR]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %0:_(s64) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s64) = COPY $x12
+ %3:_(s1) = G_TRUNC %2(s64)
+ %4:_(s64), %5:_(s1) = G_SADDE %0, %1, %3
+ %6:_(s64) = G_ANYEXT %5(s1)
+ $x10 = COPY %4(s64)
+ $x11 = COPY %6(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: sadde_i128
+body: |
+ bb.1:
+ liveins: $x10, $x11, $x12, $x13, $x14
+
+ ; CHECK-LABEL: name: sadde_i128
+ ; CHECK: liveins: $x10, $x11, $x12, $x13, $x14
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY2]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD]](s64), [[COPY]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY2]](s64), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY4]], [[C1]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD1]](s64), [[ADD]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[COPY4]]
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[AND1]]
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s64) = G_ADD [[COPY1]], [[COPY3]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD2]](s64), [[COPY1]]
+ ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY3]](s64), [[C]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ICMP3]], [[ICMP4]]
+ ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s64) = G_ADD [[ADD2]], [[OR]]
+ ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD3]](s64), [[ADD2]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP5]], [[OR]]
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[XOR1]], [[AND2]]
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY [[ADD3]](s64)
+ ; CHECK-NEXT: $x10 = COPY [[COPY5]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[COPY6]](s64)
+ ; CHECK-NEXT: $x12 = COPY [[OR1]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %0:_(s64) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s64) = COPY $x12
+ %3:_(s64) = COPY $x13
+ %4:_(s64) = COPY $x14
+ %5:_(s1) = G_TRUNC %4(s64)
+ %6:_(s64), %7:_(s1) = G_SADDE %0, %2, %5
+ %8:_(s64), %9:_(s1) = G_SADDE %1, %3, %7
+ %10:_(s64) = G_ANYEXT %9(s1)
+ $x10 = COPY %6(s64)
+ $x11 = COPY %8(s64)
+ $x12 = COPY %10(s64)
+
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+...
>From dbb5731b57f65ca989592e13b963b34d79aaab21 Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Thu, 4 Sep 2025 20:11:16 +0800
Subject: [PATCH 2/5] fix: code format
---
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 5bed202b38e46..e5cf3c341ac6c 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -151,7 +151,9 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
getActionDefinitionsBuilder(
{G_UADDE, G_UADDO, G_USUBE, G_USUBO}).lower();
- getActionDefinitionsBuilder({G_SADDO,G_SADDE, G_SSUBO}).minScalar(0, sXLen).lower();
+ getActionDefinitionsBuilder({G_SADDO, G_SADDE, G_SSUBO})
+ .minScalar(0, sXLen)
+ .lower();
// TODO: Use Vector Single-Width Saturating Instructions for vector types.
getActionDefinitionsBuilder(
>From 1df758273366ae0518fd7165ecad652216c89441 Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Thu, 4 Sep 2025 20:35:13 +0800
Subject: [PATCH 3/5] fix: review
---
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index d10ce1feaba6e..3543bf4c663f1 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -9305,8 +9305,6 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerSADDE(MachineInstr &MI) {
const LLT Ty = MRI.getType(Res);
const LLT BoolTy = MRI.getType(OvOut);
- Register NewRes = MRI.cloneVirtualRegister(Res);
-
// Step 1: tmp = LHS + RHS
auto Tmp = MIRBuilder.buildAdd(Ty, LHS, RHS);
@@ -9318,17 +9316,14 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerSADDE(MachineInstr &MI) {
// Step 2: sum = tmp + zext(CarryIn)
auto CarryInZ = MIRBuilder.buildZExt(Ty, CarryIn);
- MIRBuilder.buildAdd(NewRes, Tmp, CarryInZ);
+ MIRBuilder.buildAdd(Res, Tmp, CarryInZ);
// ov1 = CarryIn & (sum < tmp)
- auto SumLtTmp = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, NewRes, Tmp);
+ auto SumLtTmp = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, Res, Tmp);
auto Ov1 = MIRBuilder.buildAnd(BoolTy, SumLtTmp, CarryIn);
// ov = ov0 | ov1
- auto Ov = MIRBuilder.buildOr(BoolTy, Ov0, Ov1);
-
- MIRBuilder.buildCopy(OvOut, Ov);
- MIRBuilder.buildCopy(Res, NewRes);
+ MIRBuilder.buildOr(OvOut, Ov0, Ov1);
MI.eraseFromParent();
return Legalized;
>From 422c8808213bfc4222f0e2efc0029b9df29ea81b Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Thu, 4 Sep 2025 21:19:00 +0800
Subject: [PATCH 4/5] fix: ci test
---
.../RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir | 9 +++------
.../RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir | 9 +++------
2 files changed, 6 insertions(+), 12 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
index 7729cc6e8c76e..31dae11cd2d35 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
@@ -108,8 +108,7 @@ body: |
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD1]](s32), [[ADD]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[COPY2]]
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[AND1]]
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
- ; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[ADD1]](s32)
; CHECK-NEXT: $x11 = COPY [[OR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s32) = COPY $x10
@@ -148,7 +147,6 @@ body: |
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD1]](s32), [[ADD]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[COPY4]]
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[AND1]]
- ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY3]]
; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD2]](s32), [[COPY1]]
; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY3]](s32), [[C]]
@@ -157,9 +155,8 @@ body: |
; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD3]](s32), [[ADD2]]
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP5]], [[OR]]
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[XOR1]], [[AND2]]
- ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ADD3]](s32)
- ; CHECK-NEXT: $x10 = COPY [[COPY5]](s32)
- ; CHECK-NEXT: $x11 = COPY [[COPY6]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[ADD3]](s32)
; CHECK-NEXT: $x12 = COPY [[OR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s32) = COPY $x10
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
index 70b5c144f3871..e2dd413a14491 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
@@ -146,8 +146,7 @@ body: |
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD1]](s64), [[ADD]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[COPY2]]
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[AND1]]
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
- ; CHECK-NEXT: $x10 = COPY [[COPY3]](s64)
+ ; CHECK-NEXT: $x10 = COPY [[ADD1]](s64)
; CHECK-NEXT: $x11 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s64) = COPY $x10
@@ -186,7 +185,6 @@ body: |
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD1]](s64), [[ADD]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[COPY4]]
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[AND1]]
- ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s64) = G_ADD [[COPY1]], [[COPY3]]
; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD2]](s64), [[COPY1]]
; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY3]](s64), [[C]]
@@ -195,9 +193,8 @@ body: |
; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD3]](s64), [[ADD2]]
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP5]], [[OR]]
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[XOR1]], [[AND2]]
- ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY [[ADD3]](s64)
- ; CHECK-NEXT: $x10 = COPY [[COPY5]](s64)
- ; CHECK-NEXT: $x11 = COPY [[COPY6]](s64)
+ ; CHECK-NEXT: $x10 = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[ADD3]](s64)
; CHECK-NEXT: $x12 = COPY [[OR1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s64) = COPY $x10
>From d91853efd5fc0b4a1b66ca969119593264f1e76d Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Wed, 10 Sep 2025 10:49:19 +0800
Subject: [PATCH 5/5] fix: modify lowering
---
.../CodeGen/GlobalISel/LegalizerHelper.cpp | 27 ++++-----
.../legalizer/legalize-sadde-rv32.mir | 57 +++++++++----------
.../legalizer/legalize-sadde-rv64.mir | 57 +++++++++----------
3 files changed, 64 insertions(+), 77 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 3543bf4c663f1..2e7f0d6571e58 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -9303,27 +9303,20 @@ LegalizerHelper::lowerSADDO_SSUBO(MachineInstr &MI) {
LegalizerHelper::LegalizeResult LegalizerHelper::lowerSADDE(MachineInstr &MI) {
auto [Res, OvOut, LHS, RHS, CarryIn] = MI.getFirst5Regs();
const LLT Ty = MRI.getType(Res);
- const LLT BoolTy = MRI.getType(OvOut);
- // Step 1: tmp = LHS + RHS
+ // sum = LHS + RHS + zext(CarryIn)
auto Tmp = MIRBuilder.buildAdd(Ty, LHS, RHS);
+ auto CarryZ = MIRBuilder.buildZExt(Ty, CarryIn);
+ auto Sum = MIRBuilder.buildAdd(Ty, Tmp, CarryZ);
+ MIRBuilder.buildCopy(Res, Sum);
- // ov0 = (tmp < lhs) XOR (rhs < 0)
- auto TmpLtLHS = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, Tmp, LHS);
- auto Zero = MIRBuilder.buildConstant(Ty, 0);
- auto RHSLt0 = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, RHS, Zero);
- auto Ov0 = MIRBuilder.buildXor(BoolTy, TmpLtLHS, RHSLt0);
-
- // Step 2: sum = tmp + zext(CarryIn)
- auto CarryInZ = MIRBuilder.buildZExt(Ty, CarryIn);
- MIRBuilder.buildAdd(Res, Tmp, CarryInZ);
+ // OvOut = icmp slt ((sum ^ lhs) & (sum ^ rhs)), 0
+ auto AX = MIRBuilder.buildXor(Ty, Sum, LHS);
+ auto BX = MIRBuilder.buildXor(Ty, Sum, RHS);
+ auto T = MIRBuilder.buildAnd(Ty, AX, BX);
- // ov1 = CarryIn & (sum < tmp)
- auto SumLtTmp = MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, Res, Tmp);
- auto Ov1 = MIRBuilder.buildAnd(BoolTy, SumLtTmp, CarryIn);
-
- // ov = ov0 | ov1
- MIRBuilder.buildOr(OvOut, Ov0, Ov1);
+ auto Zero = MIRBuilder.buildConstant(Ty, 0);
+ MIRBuilder.buildICmp(CmpInst::ICMP_SLT, OvOut, T, Zero);
MI.eraseFromParent();
return Legalized;
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
index 31dae11cd2d35..64800fedc9d2a 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
@@ -98,18 +98,17 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD]](s32), [[COPY]]
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY1]](s32), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD1]](s32), [[ADD]]
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[COPY2]]
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[AND1]]
- ; CHECK-NEXT: $x10 = COPY [[ADD1]](s32)
- ; CHECK-NEXT: $x11 = COPY [[OR]](s32)
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY1]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[XOR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[AND1]](s32), [[C1]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
@@ -137,27 +136,25 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY2]]
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD]](s32), [[COPY]]
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY2]](s32), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[AND]]
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD1]](s32), [[ADD]]
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[COPY4]]
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[AND1]]
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ADD1]], [[COPY2]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[XOR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[AND1]](s32), [[C1]]
; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY3]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD2]](s32), [[COPY1]]
- ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY3]](s32), [[C]]
- ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ICMP3]], [[ICMP4]]
- ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD2]], [[OR]]
- ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ADD3]](s32), [[ADD2]]
- ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP5]], [[OR]]
- ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[XOR1]], [[AND2]]
- ; CHECK-NEXT: $x10 = COPY [[ADD1]](s32)
- ; CHECK-NEXT: $x11 = COPY [[ADD3]](s32)
- ; CHECK-NEXT: $x12 = COPY [[OR1]](s32)
+ ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD2]], [[ICMP]]
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ADD3]](s32)
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[ADD3]], [[COPY1]]
+ ; CHECK-NEXT: [[XOR3:%[0-9]+]]:_(s32) = G_XOR [[ADD3]], [[COPY3]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[XOR2]], [[XOR3]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[AND2]](s32), [[C1]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY5]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[COPY6]](s32)
+ ; CHECK-NEXT: $x12 = COPY [[ICMP1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
index e2dd413a14491..db1f50535b526 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
@@ -136,18 +136,17 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD]](s64), [[COPY]]
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY1]](s64), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD1]](s64), [[ADD]]
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[COPY2]]
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[AND1]]
- ; CHECK-NEXT: $x10 = COPY [[ADD1]](s64)
- ; CHECK-NEXT: $x11 = COPY [[OR]](s64)
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ADD1]], [[COPY]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ADD1]], [[COPY1]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[XOR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[AND1]](s64), [[C1]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY3]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
@@ -175,27 +174,25 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY2]]
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD]](s64), [[COPY]]
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY2]](s64), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY4]], [[C1]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY4]], [[C]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[AND]]
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD1]](s64), [[ADD]]
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[COPY4]]
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[AND1]]
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY [[ADD1]](s64)
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ADD1]], [[COPY]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ADD1]], [[COPY2]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[XOR1]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[AND1]](s64), [[C1]]
; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s64) = G_ADD [[COPY1]], [[COPY3]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD2]](s64), [[COPY1]]
- ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY3]](s64), [[C]]
- ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ICMP3]], [[ICMP4]]
- ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s64) = G_ADD [[ADD2]], [[OR]]
- ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD3]](s64), [[ADD2]]
- ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP5]], [[OR]]
- ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[XOR1]], [[AND2]]
- ; CHECK-NEXT: $x10 = COPY [[ADD1]](s64)
- ; CHECK-NEXT: $x11 = COPY [[ADD3]](s64)
- ; CHECK-NEXT: $x12 = COPY [[OR1]](s64)
+ ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s64) = G_ADD [[ADD2]], [[ICMP]]
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY [[ADD3]](s64)
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[ADD3]], [[COPY1]]
+ ; CHECK-NEXT: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[ADD3]], [[COPY3]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[XOR2]], [[XOR3]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[AND2]](s64), [[C1]]
+ ; CHECK-NEXT: $x10 = COPY [[COPY5]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[COPY6]](s64)
+ ; CHECK-NEXT: $x12 = COPY [[ICMP1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
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