[llvm] [ARM] Verify that disassembled instruction is correct (PR #157360)
Sergei Barannikov via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 9 09:15:16 PDT 2025
================
@@ -6103,9 +6076,23 @@ DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
ArrayRef<uint8_t> Bytes,
uint64_t Address,
raw_ostream &CS) const {
+ DecodeStatus S;
if (STI.hasFeature(ARM::ModeThumb))
- return getThumbInstruction(MI, Size, Bytes, Address, CS);
- return getARMInstruction(MI, Size, Bytes, Address, CS);
+ S = getThumbInstruction(MI, Size, Bytes, Address, CS);
+ else
+ S = getARMInstruction(MI, Size, Bytes, Address, CS);
+ if (S == DecodeStatus::Fail)
+ return S;
+
+ // Verify that the decoded instruction has the correct number of operands.
+ const MCInstrDesc &MCID = MCII->get(MI.getOpcode());
+ if (!MCID.isVariadic() && MI.getNumOperands() != MCID.getNumOperands()) {
+ reportFatalInternalError(MCII->getName(MI.getOpcode()) + ": expected " +
+ Twine(MCID.getNumOperands()) + " operands, got " +
+ Twine(MI.getNumOperands()) + "\n");
----------------
s-barannikov wrote:
Not sure if this should be a fatal error. Maybe report an error and continue? In case there are bugs not detected by tests.
https://github.com/llvm/llvm-project/pull/157360
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