[llvm] [AMDGPU] Remove setcc by using add/sub carryout (PR #155255)
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llvm-commits at lists.llvm.org
Mon Sep 8 14:51:52 PDT 2025
================
@@ -16036,6 +16036,61 @@ SDValue SITargetLowering::performSetCCCombine(SDNode *N,
}
}
+ // Eliminate setcc by using carryout from add/sub instruction
+
+ // LHS = ADD i64 RHS, Z LHSlo = UADDO i32 RHSlo, Zlo
+ // setcc LHS ult RHS -> LHSHi = UADDO_CARRY i32 RHShi, Zhi
+ // similarly for subtraction
+
+ // LHS = ADD i64 Y, 1 LHSlo = UADDO i32 Ylo, 1
+ // setcc LHS eq 0 -> LHSHi = UADDO_CARRY i32 Yhi, 0
+
+ // Don't split a 64-bit add/sub into two 32-bit add/sub instructions for
+ // non-divergent operations. This can result in lo/hi 32-bit operations
+ // being done in SGPR and VGPR with additional operations being needed
+ // to move operands and/or generate the intermediate carry.
+ if (VT == MVT::i64 && N->isDivergent() &&
----------------
LU-JOHN wrote:
If isDivergent is removed, SALU isel produces:
```
S_UADDO_PSEUDO
S_ADD_CO_PSEUDO
```
finalize-isel regenerates the carry between the adds:
```
S_ADD_I32
S_CSELECT_B64
S_CMP_LG_U64
S_ADDC_U32
```
For comparison, with VALU, isel produces:
```
S_UADDO_PSEUDO
V_ADDC_U32_e64
```
Then si-fix-sgpr-copies produces:
```
V_ADD_CO_U32_e64
V_ADDC_U32_e64
```
https://github.com/llvm/llvm-project/pull/155255
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