[llvm] 81a4fcb - [AMDGPU][True16][CodeGen] Fixed two lit tests (#157684)

[via llvm-commits]

Author: Brox Chen
Date: 2025-09-09T11:13:23-04:00
New Revision: 81a4fcbf4fd52ea8e593b7b6a5817bf4e1599934

URL: https://github.com/llvm/llvm-project/commit/81a4fcbf4fd52ea8e593b7b6a5817bf4e1599934
DIFF: https://github.com/llvm/llvm-project/commit/81a4fcbf4fd52ea8e593b7b6a5817bf4e1599934.diff

LOG: [AMDGPU][True16][CodeGen] Fixed two lit tests (#157684)

https://github.com/llvm/llvm-project/pull/154875 failed two lit tests

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
    llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll b/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
index 2b055c42c57c0..0cb8782feae70 100644
--- a/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11,GFX11-REAL16
-; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11,GFX11-FAKE16
+; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11-REAL16
+; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11-FAKE16
 
 ; Make sure no "vgpr32 = copy vgpr16" is generated in true16 mode
 

diff  --git a/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll b/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
index 61a13f54fae79..16ad8ec367b2d 100644
--- a/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
+++ b/llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11,GFX11-REAL16
-; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11,GFX11-FAKE16
+; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11-REAL16
+; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -stop-after=amdgpu-isel | FileCheck %s --check-prefixes=GFX11-FAKE16
 
 ; Make sure no "vgpr32 = copy vgpr16" is generated in true16 mode