[llvm] [AArch64] Use unsigned variant of `<s|u>addv_64` SVE vector reduction intrinsic for 64 bit values (PR #157418)

Rajveer Singh Bharadwaj via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 8 05:51:11 PDT 2025

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Rajveer100 wrote:

Let me know if the added tests work well.

https://github.com/llvm/llvm-project/pull/157418

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