[llvm] [RISCV] Exclude LPAD in machine outliner (PR #157220)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 7 20:54:30 PDT 2025
================
@@ -3511,6 +3511,10 @@ RISCVInstrInfo::getOutliningTypeImpl(const MachineModuleInfo &MMI,
return outliner::InstrType::Illegal;
}
+ // LPADs should not be outlined too
+ if (MI.getOpcode() == RISCV::AUIPC && MI.getOperand(0).getReg() == RISCV::X0)
----------------
wangpc-pp wrote:
You may put this into `RISCVInstrPredicates.td`.
https://github.com/llvm/llvm-project/pull/157220
More information about the llvm-commits
mailing list