[llvm] [DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (PR #155141)

[guan jian via llvm-commits]

rez5427 wrote:

> Should we allow this fold if the minmax opcode is legal? xor+minmax seems likely to be cheaper than a cmp+select+xor (even if it simplifies to cmp+and+xor)

```
if (TLI.isOperationLegal(N0.getOpcode(), VT) &&
          TLI.isPredictableSelectExpensive())
        return SDValue();
```
Well, I added the legal check as you suggested. However, I'm still learning about different ISA characteristics and haven't been able to observe meaningful differences on AArch64 in my testing. I'm not familiar with how other ISAs expand minmax operations, so there might be cases where the original sequence is more efficient.

I believe adding this check is a safe approach that avoids potential regressions on unfamiliar targets.

https://github.com/llvm/llvm-project/pull/155141