[llvm] [RISCV] Enable LUi/AUIPC+ADDI/ADDIW reg alloc hint by default (PR #155693)

[Alex Bradbury via llvm-commits]

asb wrote:

Obviously I know this has landed already etc, but out of curiosity I looked at the impact on an rva22u64 llvm-test-suite build. Interestingly there's a minor reduction in static instruction count (`190840 insertions(+), 196374 deletions(-)`), and looking at the causes these are all cases involving function calls looking something like:

```
-       auipc   a0, %pcrel_hi(.L.str.5)
-       addi    a1, a0, %pcrel_lo(.Lpcrel_hi17)
+       auipc   a1, %pcrel_hi(.L.str.5)
+       addi    a1, a1, %pcrel_lo(.Lpcrel_hi17)
        mv      a2, sp
-       mv      a0, s1
        call    __isoc99_fscanf
```

or similarly:
```
-       auipc   a0, %pcrel_hi(.L.str.33)
-       addi    a1, a0, %pcrel_lo(.Lpcrel_hi42)
+       auipc   a1, %pcrel_hi(.L.str.33)
+       addi    a1, a1, %pcrel_lo(.Lpcrel_hi42)
        li      a2, 60
-       mv      a0, s1
        call    memcpy
```

i.e. before the register allocator dirtied `a0` and then had to do additional register shuffling for a the following function call, when it could have used a different register with no cost. It does make me wonder if there are other cases where the register allocator is choosing to use more registers than appears necessary...

https://github.com/llvm/llvm-project/pull/155693