[llvm] [ValueTracking] Don't take sign bit from NaN operands (PR #157250)
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Sat Sep 6 04:40:25 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Yingwei Zheng (dtcxzyw)
<details>
<summary>Changes</summary>
Closes https://github.com/llvm/llvm-project/issues/157238.
---
Full diff: https://github.com/llvm/llvm-project/pull/157250.diff
2 Files Affected:
- (modified) llvm/lib/Analysis/ValueTracking.cpp (+5)
- (modified) llvm/test/Transforms/InstCombine/is_fpclass.ll (+15)
``````````diff
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 07950f5341d6c..ff9b9f4f8d121 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -5058,6 +5058,11 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
KnownRHS.isKnownNeverPosZero()) &&
(KnownLHS.isKnownNeverPosZero() ||
KnownRHS.isKnownNeverNegZero()))) {
+ // Don't take sign bit from NaN operands.
+ if (!KnownLHS.isKnownNeverNaN())
+ KnownLHS.SignBit = std::nullopt;
+ if (!KnownRHS.isKnownNeverNaN())
+ KnownRHS.SignBit = std::nullopt;
if ((IID == Intrinsic::maximum || IID == Intrinsic::maximumnum ||
IID == Intrinsic::maxnum) &&
(KnownLHS.SignBit == false || KnownRHS.SignBit == false))
diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll
index c1809b8bec61c..e5f72b415d441 100644
--- a/llvm/test/Transforms/InstCombine/is_fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll
@@ -3922,6 +3922,21 @@ define i1 @test_class_is_not_psub_pnorm_pinf__dynamic(float %arg) #3 {
ret i1 %class
}
+; Make sure we don't take sign bit from NaN operands.
+
+define i1 @minnum_qnan(i32 %x) {
+; CHECK-LABEL: @minnum_qnan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i1 true
+;
+entry:
+ %qnan_bits = or i32 %x, -5938
+ %qnan = bitcast i32 %qnan_bits to float
+ %min = call float @llvm.minnum.f32(float %qnan, float 0.000000e+00)
+ %test = call i1 @llvm.is.fpclass.f32(float %min, i32 64)
+ ret i1 %test
+}
+
declare i1 @llvm.is.fpclass.f32(float, i32 immarg)
declare i1 @llvm.is.fpclass.f64(double, i32 immarg)
declare <2 x i1> @llvm.is.fpclass.v2f32(<2 x float>, i32 immarg)
``````````
</details>
https://github.com/llvm/llvm-project/pull/157250
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