[llvm] Add more generic `half`/`bfloat` tests (NFC) (PR #157211)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 6 03:21:24 PDT 2025
================
@@ -0,0 +1,106 @@
+; Same as `bfloat.ll`, but for `fneg`, `fabs`, `copysign` and `fma`.
+; Can be merged back into `bfloat.ll` once they have the same platform coverage.
+; Once all targets are fixed, the `CHECK-*` prefixes should all be merged into a single `CHECK` prefix and the `BAD-*` prefixes should be removed.
+
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-apple-darwin | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,CHECK-FMA %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,CHECK-FMA %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,CHECK-FMA %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=arm64ec-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,CHECK-FMA %}
+; RUN: %if amdgpu-registered-target %{ llc %s -o - -mtriple=amdgcn-amd-amdhsa | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,CHECK-FMA %}
+; RUN: %if arc-registered-target %{ llc %s -o - -mtriple=arc-elf | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if arm-registered-target %{ llc %s -o - -mtriple=arm-unknown-linux-gnueabi | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if arm-registered-target %{ llc %s -o - -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if avr-registered-target %{ llc %s -o - -mtriple=avr-none | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; FIXME: BPF has a compiler error
+; RUN: %if csky-registered-target %{ llc %s -o - -mtriple=csky-unknown-linux-gnuabiv2 | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; FIXME: hard float csky crashes
+; FIXME: directx has a compiler error
+; FIXME: hexagon crashes
+; RUN: %if lanai-registered-target %{ llc %s -o - -mtriple=lanai-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch32-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch64-unknown-linux-gnu -mattr=+f | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if m68k-registered-target %{ llc %s -o - -mtriple=m68k-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; FIXME: mips crashes
+; RUN: %if msp430-registered-target %{ llc %s -o - -mtriple=msp430-none-elf | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if nvptx-registered-target %{ llc %s -o - -mtriple=nvptx64-nvidia-cuda | FileCheck %s --check-prefixes=NOCRASH %}
+; FIXME: powerpc crashes
+; RUN: %if riscv-registered-target %{ llc %s -o - -mtriple=riscv32-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if riscv-registered-target %{ llc %s -o - -mtriple=riscv64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; FIXME: sparc crashes
+; FIXME: spirv crashes
+; FIXME: s390x crashes
+; FIXME: ve crashes
+; FIXME: wasm crashes
+; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK-NEG,CHECK-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if xcore-registered-target %{ llc %s -o - -mtriple=xcore-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD-NEG,BAD-ABS,CHECK-COPYSIGN,BAD-FMA %}
+; RUN: %if xtensa-registered-target %{ llc %s -o - -mtriple=xtensa-none-elf | FileCheck %s --check-prefixes=ALL,BAD-NEG,CHECK-ABS,BAD-COPYSIGN,CHECK-FMA %}
+
+; Note that arm64ec labels are quoted, hence the `{{"?}}:`.
+
+; Codegen tests don't work the same for graphics targets. Add a dummy directive
+; for filecheck, just make sure we don't crash.
+; NOCRASH: {{.*}}
+
+; fneg, fabs and copysign all need to not quieten signalling NaNs, so should not call any conversion functions which do.
+; These tests won't catch cases where the everything is done using native instructions instead of builtins.
+
+define void @test_fneg(ptr %p1, ptr %p2) #0 {
+; ALL-LABEL: test_fneg{{"?}}:
+; CHECK-NEG-NOT: __extend
+; CHECK-NEG-NOT: __trunc
+; CHECK-NEG-NOT: __gnu
+; CHECK-NEG-NOT: __aeabi
+; BAD-NEG: __truncsfbf2
+ %v = load bfloat, ptr %p1
+ %res = fneg bfloat %v
+ store bfloat %res, ptr %p2
+ ret void
+}
+
+define void @test_fabs(ptr %p1, ptr %p2) {
+; ALL-LABEL: test_fabs{{"?}}:
+; CHECK-ABS-NOT: __extend
+; CHECK-ABS-NOT: __trunc
+; CHECK-ABS-NOT: __gnu
+; CHECK-ABS-NOT: __aeabi
+; BAD-ABS: __truncsfbf2
+ %a = load bfloat, ptr %p1
+ %r = call bfloat @llvm.fabs.f16(bfloat %a)
+ store bfloat %r, ptr %p2
+ ret void
+}
+
+define void @test_copysign(ptr %p1, ptr %p2, ptr %p3) {
+; ALL-LABEL: test_copysign{{"?}}:
+; CHECK-COPYSIGN-NOT: __extend
+; CHECK-COPYSIGN-NOT: __trunc
+; CHECK-COPYSIGN-NOT: __gnu
+; CHECK-COPYSIGN-NOT: __aeabi
+; BAD-COPYSIGN: __truncsfbf2
+ %a = load bfloat, ptr %p1
+ %b = load bfloat, ptr %p2
+ %r = call bfloat @llvm.copysign.f16(bfloat %a, bfloat %b)
+ store bfloat %r, ptr %p3
+ ret void
+}
+
+; There is no floating-point type LLVM supports that is large enough to promote bfloat FMA to
+; without causing double rounding issues. This checks for libcalls to f32/f64 fma and truncating
+; f32/f64 to bf16. See https://github.com/llvm/llvm-project/issues/131531
----------------
nikic wrote:
I don't think this test is useful. Checking the output for the two (non-experimental) targets that are not BAD (https://llvm.godbolt.org/z/cd6G1nzd7) we see that they're actually also bad, they just don't use libcalls to perform the conversion.
https://github.com/llvm/llvm-project/pull/157211
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