[llvm] [SPIRV] Add FPVariant tracking for floating-point registers in SPIR-V (PR #156871)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 5 12:20:25 PDT 2025
https://github.com/YixingZhang007 updated https://github.com/llvm/llvm-project/pull/156871
>From f44dccefc0dc98d43b583218def7e1880212e85a Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Thu, 4 Sep 2025 05:14:39 -0700
Subject: [PATCH 1/9] add the support for bfloat in SPIRV
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 26 ++++++++++++++++++-
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 13 ++++++++++
2 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index cfe24c84941a9..0f258e03b23c8 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -1122,7 +1122,19 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual,
ExplicitLayoutRequired, EmitIR);
TypesInProcessing.erase(Ty);
- VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType;
+
+ // Record the FPVariant of the floating-point registers in the
+ // VRegFPVariantMap.
+ MachineFunction *MF = &MIRBuilder.getMF();
+ Register TypeReg = getSPIRVTypeID(SpirvType);
+ if (Ty->isFloatingPointTy()) {
+ if (Ty->isBFloatTy()) {
+ VRegFPVariantMap[MF][TypeReg] = FPVariant::BRAIN_FLOAT;
+ } else {
+ VRegFPVariantMap[MF][TypeReg] = FPVariant::IEEE_FLOAT;
+ }
+ }
+ VRegToTypeMap[MF][TypeReg] = SpirvType;
// TODO: We could end up with two SPIR-V types pointing to the same llvm type.
// Is that a problem?
@@ -2088,3 +2100,15 @@ bool SPIRVGlobalRegistry::hasBlockDecoration(SPIRVType *Type) const {
}
return false;
}
+
+SPIRVGlobalRegistry::FPVariant
+SPIRVGlobalRegistry::getFPVariantForVReg(Register VReg,
+ const MachineFunction *MF) {
+ auto t = VRegFPVariantMap.find(MF ? MF : CurMF);
+ if (t != VRegFPVariantMap.end()) {
+ auto tt = t->second.find(VReg);
+ if (tt != t->second.end())
+ return tt->second;
+ }
+ return FPVariant::NONE;
+}
\ No newline at end of file
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index 7ef812828b7cc..1f8c30dc01f7f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -29,6 +29,10 @@ using SPIRVType = const MachineInstr;
using StructOffsetDecorator = std::function<void(Register)>;
class SPIRVGlobalRegistry : public SPIRVIRMapping {
+public:
+ enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
+
+private:
// Registers holding values which have types associated with them.
// Initialized upon VReg definition in IRTranslator.
// Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
@@ -88,6 +92,11 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
// map of aliasing decorations to aliasing metadata
std::unordered_map<const MDNode *, MachineInstr *> AliasInstMDMap;
+ // Maps floating point Registers to their FPVariant (float type kind), given
+ // the MachineFunction.
+ DenseMap<const MachineFunction *, DenseMap<Register, FPVariant>>
+ VRegFPVariantMap;
+
// Add a new OpTypeXXX instruction without checking for duplicates.
SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier::AccessQualifier AQ,
@@ -422,6 +431,10 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
// structures referring this instruction.
void invalidateMachineInstr(MachineInstr *MI);
+ // Return the FPVariant of to the given floating-point regiester.
+ FPVariant getFPVariantForVReg(Register VReg,
+ const MachineFunction *MF = nullptr);
+
private:
SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
>From 4ff058a89365990078ba510938746e7b29f7b0ab Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Thu, 4 Sep 2025 05:56:56 -0700
Subject: [PATCH 2/9] nit
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 0f258e03b23c8..e1bb2b912aa3c 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -2111,4 +2111,4 @@ SPIRVGlobalRegistry::getFPVariantForVReg(Register VReg,
return tt->second;
}
return FPVariant::NONE;
-}
\ No newline at end of file
+}
>From 512203c28aee454f9fa3abfc037cbbf99020715c Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 07:31:11 -0700
Subject: [PATCH 3/9] nit change
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index e1bb2b912aa3c..6255ec5546ec7 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -2104,11 +2104,16 @@ bool SPIRVGlobalRegistry::hasBlockDecoration(SPIRVType *Type) const {
SPIRVGlobalRegistry::FPVariant
SPIRVGlobalRegistry::getFPVariantForVReg(Register VReg,
const MachineFunction *MF) {
- auto t = VRegFPVariantMap.find(MF ? MF : CurMF);
- if (t != VRegFPVariantMap.end()) {
- auto tt = t->second.find(VReg);
- if (tt != t->second.end())
- return tt->second;
+ const MachineFunction *Func = MF ? MF : CurMF;
+ DenseMap<const MachineFunction *, DenseMap<Register, FPVariant>>::const_iterator FuncIt =
+ VRegFPVariantMap.find(Func);
+
+ if (FuncIt != VRegFPVariantMap.end()) {
+ const DenseMap<Register, FPVariant> &VRegMap = FuncIt->second;
+ DenseMap<Register, FPVariant>::const_iterator VRegIt = VRegMap.find(VReg);
+
+ if (VRegIt != VRegMap.end())
+ return VRegIt->second;
}
return FPVariant::NONE;
}
>From 0547035253a266d4589792347febfdb9f5324053 Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 07:39:32 -0700
Subject: [PATCH 4/9] solve clang format issue
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 6255ec5546ec7..9ff5408f65d1a 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -2105,7 +2105,8 @@ SPIRVGlobalRegistry::FPVariant
SPIRVGlobalRegistry::getFPVariantForVReg(Register VReg,
const MachineFunction *MF) {
const MachineFunction *Func = MF ? MF : CurMF;
- DenseMap<const MachineFunction *, DenseMap<Register, FPVariant>>::const_iterator FuncIt =
+ DenseMap<const MachineFunction *,
+ DenseMap<Register, FPVariant>>::const_iterator FuncIt =
VRegFPVariantMap.find(Func);
if (FuncIt != VRegFPVariantMap.end()) {
>From f3bef6775ef1f3c9db0a16c2296f7de396651a8a Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 10:50:50 -0700
Subject: [PATCH 5/9] CI test currently failing, revert all change to see if it
is CI container issue
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 50 +++++++++----------
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 14 +++---
2 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 9ff5408f65d1a..2a79bea6a71e7 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -1125,16 +1125,16 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
// Record the FPVariant of the floating-point registers in the
// VRegFPVariantMap.
- MachineFunction *MF = &MIRBuilder.getMF();
- Register TypeReg = getSPIRVTypeID(SpirvType);
- if (Ty->isFloatingPointTy()) {
- if (Ty->isBFloatTy()) {
- VRegFPVariantMap[MF][TypeReg] = FPVariant::BRAIN_FLOAT;
- } else {
- VRegFPVariantMap[MF][TypeReg] = FPVariant::IEEE_FLOAT;
- }
- }
- VRegToTypeMap[MF][TypeReg] = SpirvType;
+ // MachineFunction *MF = &MIRBuilder.getMF();
+ // Register TypeReg = getSPIRVTypeID(SpirvType);
+ // if (Ty->isFloatingPointTy()) {
+ // if (Ty->isBFloatTy()) {
+ // VRegFPVariantMap[MF][TypeReg] = FPVariant::BRAIN_FLOAT;
+ // } else {
+ // VRegFPVariantMap[MF][TypeReg] = FPVariant::IEEE_FLOAT;
+ // }
+ // }
+ // VRegToTypeMap[MF][TypeReg] = SpirvType;
// TODO: We could end up with two SPIR-V types pointing to the same llvm type.
// Is that a problem?
@@ -2101,20 +2101,20 @@ bool SPIRVGlobalRegistry::hasBlockDecoration(SPIRVType *Type) const {
return false;
}
-SPIRVGlobalRegistry::FPVariant
-SPIRVGlobalRegistry::getFPVariantForVReg(Register VReg,
- const MachineFunction *MF) {
- const MachineFunction *Func = MF ? MF : CurMF;
- DenseMap<const MachineFunction *,
- DenseMap<Register, FPVariant>>::const_iterator FuncIt =
- VRegFPVariantMap.find(Func);
+// SPIRVGlobalRegistry::FPVariant
+// SPIRVGlobalRegistry::getFPVariantForVReg(Register VReg,
+// const MachineFunction *MF) {
+// const MachineFunction *Func = MF ? MF : CurMF;
+// DenseMap<const MachineFunction *,
+// DenseMap<Register, FPVariant>>::const_iterator FuncIt =
+// VRegFPVariantMap.find(Func);
- if (FuncIt != VRegFPVariantMap.end()) {
- const DenseMap<Register, FPVariant> &VRegMap = FuncIt->second;
- DenseMap<Register, FPVariant>::const_iterator VRegIt = VRegMap.find(VReg);
+// if (FuncIt != VRegFPVariantMap.end()) {
+// const DenseMap<Register, FPVariant> &VRegMap = FuncIt->second;
+// DenseMap<Register, FPVariant>::const_iterator VRegIt = VRegMap.find(VReg);
- if (VRegIt != VRegMap.end())
- return VRegIt->second;
- }
- return FPVariant::NONE;
-}
+// if (VRegIt != VRegMap.end())
+// return VRegIt->second;
+// }
+// return FPVariant::NONE;
+// }
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index 1f8c30dc01f7f..fa397c5410dd8 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -29,10 +29,10 @@ using SPIRVType = const MachineInstr;
using StructOffsetDecorator = std::function<void(Register)>;
class SPIRVGlobalRegistry : public SPIRVIRMapping {
-public:
- enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
+// public:
+// enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
-private:
+// private:
// Registers holding values which have types associated with them.
// Initialized upon VReg definition in IRTranslator.
// Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
@@ -94,8 +94,8 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
// Maps floating point Registers to their FPVariant (float type kind), given
// the MachineFunction.
- DenseMap<const MachineFunction *, DenseMap<Register, FPVariant>>
- VRegFPVariantMap;
+ // DenseMap<const MachineFunction *, DenseMap<Register, FPVariant>>
+ // VRegFPVariantMap;
// Add a new OpTypeXXX instruction without checking for duplicates.
SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
@@ -432,8 +432,8 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
void invalidateMachineInstr(MachineInstr *MI);
// Return the FPVariant of to the given floating-point regiester.
- FPVariant getFPVariantForVReg(Register VReg,
- const MachineFunction *MF = nullptr);
+ // FPVariant getFPVariantForVReg(Register VReg,
+ // const MachineFunction *MF = nullptr);
private:
SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
>From 532f0e8a72895c17695e24f21138cf5566890415 Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 11:11:37 -0700
Subject: [PATCH 6/9] Add the missing change
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 2a79bea6a71e7..aebdaf95145c3 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -1122,7 +1122,8 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual,
ExplicitLayoutRequired, EmitIR);
TypesInProcessing.erase(Ty);
-
+ VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType;
+
// Record the FPVariant of the floating-point registers in the
// VRegFPVariantMap.
// MachineFunction *MF = &MIRBuilder.getMF();
>From c3df18abfe1bd7b2535fec152e200fad6a85b79e Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 11:14:06 -0700
Subject: [PATCH 7/9] Reactive the spirv tests
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 2 +-
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index aebdaf95145c3..adf6c64357a7e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -1123,7 +1123,7 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
ExplicitLayoutRequired, EmitIR);
TypesInProcessing.erase(Ty);
VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType;
-
+
// Record the FPVariant of the floating-point registers in the
// VRegFPVariantMap.
// MachineFunction *MF = &MIRBuilder.getMF();
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index fa397c5410dd8..b02edb6a1f4f7 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -29,10 +29,10 @@ using SPIRVType = const MachineInstr;
using StructOffsetDecorator = std::function<void(Register)>;
class SPIRVGlobalRegistry : public SPIRVIRMapping {
-// public:
-// enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
+public:
+ enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
-// private:
+private:
// Registers holding values which have types associated with them.
// Initialized upon VReg definition in IRTranslator.
// Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
>From a5c8be562acd9098d7c5c9cd2bcf1778ce7948b2 Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 11:15:55 -0700
Subject: [PATCH 8/9] active the spirv test
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 7 +++----
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 6 +++---
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index adf6c64357a7e..ee59dfbb115d8 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -1122,12 +1122,11 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual,
ExplicitLayoutRequired, EmitIR);
TypesInProcessing.erase(Ty);
- VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType;
// Record the FPVariant of the floating-point registers in the
// VRegFPVariantMap.
- // MachineFunction *MF = &MIRBuilder.getMF();
- // Register TypeReg = getSPIRVTypeID(SpirvType);
+ MachineFunction *MF = &MIRBuilder.getMF();
+ Register TypeReg = getSPIRVTypeID(SpirvType);
// if (Ty->isFloatingPointTy()) {
// if (Ty->isBFloatTy()) {
// VRegFPVariantMap[MF][TypeReg] = FPVariant::BRAIN_FLOAT;
@@ -1135,7 +1134,7 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
// VRegFPVariantMap[MF][TypeReg] = FPVariant::IEEE_FLOAT;
// }
// }
- // VRegToTypeMap[MF][TypeReg] = SpirvType;
+ VRegToTypeMap[MF][TypeReg] = SpirvType;
// TODO: We could end up with two SPIR-V types pointing to the same llvm type.
// Is that a problem?
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index b02edb6a1f4f7..fa397c5410dd8 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -29,10 +29,10 @@ using SPIRVType = const MachineInstr;
using StructOffsetDecorator = std::function<void(Register)>;
class SPIRVGlobalRegistry : public SPIRVIRMapping {
-public:
- enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
+// public:
+// enum class FPVariant { NONE, IEEE_FLOAT, BRAIN_FLOAT };
-private:
+// private:
// Registers holding values which have types associated with them.
// Initialized upon VReg definition in IRTranslator.
// Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
>From 7459a6587034fc82b8f0fcdb7ece54f8fd292c83 Mon Sep 17 00:00:00 2001
From: "Zhang, Yixing" <yixing.zhang at intel.com>
Date: Fri, 5 Sep 2025 12:18:40 -0700
Subject: [PATCH 9/9] revert all the change
---
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index ee59dfbb115d8..adf6c64357a7e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -1122,11 +1122,12 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual,
ExplicitLayoutRequired, EmitIR);
TypesInProcessing.erase(Ty);
+ VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType;
// Record the FPVariant of the floating-point registers in the
// VRegFPVariantMap.
- MachineFunction *MF = &MIRBuilder.getMF();
- Register TypeReg = getSPIRVTypeID(SpirvType);
+ // MachineFunction *MF = &MIRBuilder.getMF();
+ // Register TypeReg = getSPIRVTypeID(SpirvType);
// if (Ty->isFloatingPointTy()) {
// if (Ty->isBFloatTy()) {
// VRegFPVariantMap[MF][TypeReg] = FPVariant::BRAIN_FLOAT;
@@ -1134,7 +1135,7 @@ SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
// VRegFPVariantMap[MF][TypeReg] = FPVariant::IEEE_FLOAT;
// }
// }
- VRegToTypeMap[MF][TypeReg] = SpirvType;
+ // VRegToTypeMap[MF][TypeReg] = SpirvType;
// TODO: We could end up with two SPIR-V types pointing to the same llvm type.
// Is that a problem?
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