[llvm] [LoongArch] Optimize extractelement containing variable index for lsx (PR #156792)

via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 5 02:57:08 PDT 2025


zhaoqi5 wrote:

> Very little regression. [tangaac/loong-opt-cov-ts at 9805f6b](https://github.com/tangaac/loong-opt-cov-ts/commit/9805f6b186621f58d05a1f699ffe62503c343abb)

Seems that only `test-suite/result-156792/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/Alloc.s` is directly influenced by this optimization. Because other tests do not generate `vshuf` instructions.

I try this: (set 128-bit `extractelement` as `custom`, but just return it without any conversion when legalizing)
```
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 634914d3b3..cca294202d 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -287,7 +287,7 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
       setOperationAction(ISD::UNDEF, VT, Legal);
 
       setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
-      setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Legal);
+      setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
       setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
 
       setOperationAction(ISD::SETCC, VT, Legal);
@@ -2834,7 +2834,8 @@ LoongArchTargetLowering::lowerEXTRACT_VECTOR_ELT(SDValue Op,
   SDLoc DL(Op);
   MVT GRLenVT = Subtarget.getGRLenVT();
 
-  assert(VecTy.is256BitVector() && "Unexpected EXTRACT_VECTOR_ELT vector type");
+  if (VecTy.is128BitVector())
+    return Op;
 
   if (isa<ConstantSDNode>(Idx))
     return Op;
```

The result shows that the tests (except for `Alloc.s`) are same as shown in the link. I am not sure why this happens.

https://github.com/llvm/llvm-project/pull/156792


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