[llvm] [GlobalISel] Add G_ABS computeKnownBits, add ComputeKnownBitsCache assertion to computeNumSignBits (PR #154413)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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``````````diff
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h b/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
index 01898cd85..17fcb91d7 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
@@ -70,8 +70,7 @@ public:
                                     const APInt &DemandedElts,
                                     unsigned Depth = 0);
 
-  virtual unsigned computeNumSignBitsImpl(Register R,
-                                          const APInt &DemandedElts,
+  virtual unsigned computeNumSignBitsImpl(Register R, const APInt &DemandedElts,
                                           unsigned Depth = 0);
 
   unsigned computeNumSignBits(Register R, const APInt &DemandedElts,
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 525a361c2..7cfb86b5e 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -701,8 +701,8 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
     Register SrcReg = MI.getOperand(1).getReg();
     computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1);
     Known = Known.abs();
-    Known.Zero.setHighBits(computeNumSignBitsImpl(SrcReg, DemandedElts, Depth + 1) -
-                           1);
+    Known.Zero.setHighBits(
+        computeNumSignBitsImpl(SrcReg, DemandedElts, Depth + 1) - 1);
     break;
   }
   }
@@ -1759,7 +1759,8 @@ unsigned GISelValueTracking::computeNumSignBitsMin(Register Src0, Register Src1,
   unsigned Src1SignBits = computeNumSignBitsImpl(Src1, DemandedElts, Depth);
   if (Src1SignBits == 1)
     return 1;
-  return std::min(computeNumSignBitsImpl(Src0, DemandedElts, Depth), Src1SignBits);
+  return std::min(computeNumSignBitsImpl(Src0, DemandedElts, Depth),
+                  Src1SignBits);
 }
 
 /// Compute the known number of sign bits with attached range metadata in the
@@ -1790,8 +1791,8 @@ static unsigned computeNumSignBitsFromRangeMetadata(const GAnyLoad *Ld,
 }
 
 unsigned GISelValueTracking::computeNumSignBitsImpl(Register R,
-                                                const APInt &DemandedElts,
-                                                unsigned Depth) {
+                                                    const APInt &DemandedElts,
+                                                    unsigned Depth) {
   MachineInstr &MI = *MRI.getVRegDef(R);
   unsigned Opcode = MI.getOpcode();
 
@@ -1907,7 +1908,8 @@ unsigned GISelValueTracking::computeNumSignBitsImpl(Register R,
     // Check if the sign bits of source go down as far as the truncated value.
     unsigned DstTyBits = DstTy.getScalarSizeInBits();
     unsigned NumSrcBits = SrcTy.getScalarSizeInBits();
-    unsigned NumSrcSignBits = computeNumSignBitsImpl(Src, DemandedElts, Depth + 1);
+    unsigned NumSrcSignBits =
+        computeNumSignBitsImpl(Src, DemandedElts, Depth + 1);
     if (NumSrcSignBits > (NumSrcBits - DstTyBits))
       return NumSrcSignBits - (NumSrcBits - DstTyBits);
     break;
@@ -1989,7 +1991,8 @@ unsigned GISelValueTracking::computeNumSignBitsImpl(Register R,
           DemandedElts.extractBits(NumSubVectorElts, I * NumSubVectorElts);
       if (!DemandedSub)
         continue;
-      unsigned Tmp2 = computeNumSignBitsImpl(MO.getReg(), DemandedSub, Depth + 1);
+      unsigned Tmp2 =
+          computeNumSignBitsImpl(MO.getReg(), DemandedSub, Depth + 1);
 
       FirstAnswer = std::min(FirstAnswer, Tmp2);
 
@@ -2015,8 +2018,8 @@ unsigned GISelValueTracking::computeNumSignBitsImpl(Register R,
     if (FirstAnswer == 1)
       break;
     if (!!DemandedRHS) {
-      unsigned Tmp2 =
-          computeNumSignBitsImpl(MI.getOperand(2).getReg(), DemandedRHS, Depth + 1);
+      unsigned Tmp2 = computeNumSignBitsImpl(MI.getOperand(2).getReg(),
+                                             DemandedRHS, Depth + 1);
       FirstAnswer = std::min(FirstAnswer, Tmp2);
     }
     break;
@@ -2024,7 +2027,8 @@ unsigned GISelValueTracking::computeNumSignBitsImpl(Register R,
   case TargetOpcode::G_SPLAT_VECTOR: {
     // Check if the sign bits of source go down as far as the truncated value.
     Register Src = MI.getOperand(1).getReg();
-    unsigned NumSrcSignBits = computeNumSignBitsImpl(Src, APInt(1, 1), Depth + 1);
+    unsigned NumSrcSignBits =
+        computeNumSignBitsImpl(Src, APInt(1, 1), Depth + 1);
     unsigned NumSrcBits = MRI.getType(Src).getSizeInBits();
     if (NumSrcSignBits > (NumSrcBits - TyBits))
       return NumSrcSignBits - (NumSrcBits - TyBits);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index c7c1ebe9c..bbaf9172e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -6113,13 +6113,16 @@ unsigned AMDGPUTargetLowering::computeNumSignBitsForTargetInstr(
   case AMDGPU::G_AMDGPU_SMED3:
   case AMDGPU::G_AMDGPU_UMED3: {
     auto [Dst, Src0, Src1, Src2] = MI->getFirst4Regs();
-    unsigned Tmp2 = Analysis.computeNumSignBitsImpl(Src2, DemandedElts, Depth + 1);
+    unsigned Tmp2 =
+        Analysis.computeNumSignBitsImpl(Src2, DemandedElts, Depth + 1);
     if (Tmp2 == 1)
       return 1;
-    unsigned Tmp1 = Analysis.computeNumSignBitsImpl(Src1, DemandedElts, Depth + 1);
+    unsigned Tmp1 =
+        Analysis.computeNumSignBitsImpl(Src1, DemandedElts, Depth + 1);
     if (Tmp1 == 1)
       return 1;
-    unsigned Tmp0 = Analysis.computeNumSignBitsImpl(Src0, DemandedElts, Depth + 1);
+    unsigned Tmp0 =
+        Analysis.computeNumSignBitsImpl(Src0, DemandedElts, Depth + 1);
     if (Tmp0 == 1)
       return 1;
     return std::min({Tmp0, Tmp1, Tmp2});

``````````

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https://github.com/llvm/llvm-project/pull/154413