[llvm] AMDGPU: AsmParser boilerplate for missing features (PR #157013)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 4 21:57:29 PDT 2025
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/157013
The management of subtarget dependent assembler errors
is currently ignoring the reported issues from MatchInstructionImpl.
Move code around to try making use of it.
>From 07907a1fee9e378e0829f5c11ab2dcf89c3232da Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 5 Sep 2025 10:18:08 +0900
Subject: [PATCH] AMDGPU: AsmParser boilerplate for missing features
The management of subtarget dependent assembler errors
is currently ignoring the reported issues from MatchInstructionImpl.
Move code around to try making use of it.
---
.../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index fc46f2b6e93dd..522aae08d7353 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1391,6 +1391,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
#define GET_ASSEMBLER_HEADER
#include "AMDGPUGenAsmMatcher.inc"
+#undef GET_ASSEMBLER_HEADER
/// }
@@ -2023,6 +2024,12 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
ParseStatus parseVOPD(OperandVector &Operands);
};
+// TODO: define GET_SUBTARGET_FEATURE_NAME
+#define GET_REGISTER_MATCHER
+#include "AMDGPUGenAsmMatcher.inc"
+#undef GET_REGISTER_MATCHER
+#undef GET_SUBTARGET_FEATURE_NAME
+
} // end anonymous namespace
// May be called with integer type with equivalent bitwidth.
@@ -5838,10 +5845,14 @@ bool AMDGPUAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
MCInst Inst;
Inst.setLoc(IDLoc);
unsigned Result = Match_Success;
+ FeatureBitset MissingFeatures;
+
for (auto Variant : getMatchedVariants()) {
uint64_t EI;
- auto R = MatchInstructionImpl(Operands, Inst, EI, MatchingInlineAsm,
- Variant);
+ auto R = MatchInstructionImpl(Operands, Inst, EI, MissingFeatures,
+ MatchingInlineAsm, Variant);
+
+ // TODO: Emit diagnostic from MissingFeatures.
// We order match statuses from least to most specific. We use most specific
// status as resulting
// Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature
@@ -10497,7 +10508,6 @@ LLVMInitializeAMDGPUAsmParser() {
RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
}
-#define GET_REGISTER_MATCHER
#define GET_MATCHER_IMPLEMENTATION
#define GET_MNEMONIC_SPELL_CHECKER
#define GET_MNEMONIC_CHECKER
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