[llvm] AMDGPU: Check aligned vgpr feature in assembler (PR #156997)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 4 18:31:23 PDT 2025


https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/156997

Use the new feature instead of listing the two separate cases.

>From 694857d38b7e5f88d4cb5b1d9f044398fa9377cb Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 5 Sep 2025 10:24:10 +0900
Subject: [PATCH] AMDGPU: Check aligned vgpr feature in assembler

Use the new feature instead of listing the two separate cases.
---
 llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index fc46f2b6e93dd..2ce1e9e410b23 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -5234,7 +5234,7 @@ bool AMDGPUAsmParser::validateAGPRLdSt(const MCInst &Inst) const {
 
 bool AMDGPUAsmParser::validateVGPRAlign(const MCInst &Inst) const {
   auto FB = getFeatureBits();
-  if (!FB[AMDGPU::FeatureGFX90AInsts] && !FB[AMDGPU::FeatureGFX1250Insts])
+  if (!FB[AMDGPU::FeatureRequiresAlignedVGPRs])
     return true;
 
   unsigned Opc = Inst.getOpcode();



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