[llvm] [X86] Recognise VPMADD52L pattern with AVX512IFMA/AVXIFMA (#153787) (PR #156714)

Justin Riddell via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 4 11:56:39 PDT 2025


================
@@ -57966,6 +57966,51 @@ static SDValue pushAddIntoCmovOfConsts(SDNode *N, const SDLoc &DL,
                      Cmov.getOperand(3));
 }
 
+static SDValue matchIntegerMultiplyAdd(SDNode *N, SelectionDAG &DAG,
+                                       SDValue Op0, SDValue Op1,
+                                       const SDLoc &DL, EVT VT,
+                                       const X86Subtarget &Subtarget) {
+  using namespace SDPatternMatch;
+  if (!VT.isVector() || VT.getScalarType() != MVT::i64 ||
+      !Subtarget.hasAVX512() ||
+      (!Subtarget.hasAVXIFMA() && !Subtarget.hasIFMA()) ||
+      !DAG.getTargetLoweringInfo().isOperationLegalOrCustom(X86ISD::VPMADD52L,
----------------
Arghnews wrote:

I'm still unclear on exactly how to use SplitOpsAndApply but will have a further look.

Can you help me understand, I believe I pass VT to SplitOpsAndApply and in the lambda, what VT will I pass to the DAG.getNode call?

Should I be able to generate a test case for this, that will fail before and pass after, by tinkering with the mattr options, and the case would be a vector that is too wide or too narrow?

@RKSimon 

https://github.com/llvm/llvm-project/pull/156714


More information about the llvm-commits mailing list