[llvm] [RISCV][GISel] Lower G_ABDS and G_ABDU (PR #155888)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 4 10:32:12 PDT 2025


================
@@ -4742,6 +4755,16 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
     return lowerShlSat(MI);
   case G_ABS:
     return lowerAbsToAddXor(MI);
+  case G_ABDS:
+  case G_ABDU: {
+    bool IsSign = MI.getOpcode() == G_ABS;
----------------
topperc wrote:

`IsSign` -> `IsSigned` to match the convention in the rest of this file.

https://github.com/llvm/llvm-project/pull/155888


More information about the llvm-commits mailing list