[llvm] [ARM] Specify hasOneUse for shouldFoldConstantShiftPairToMask (PR #156915)
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Thu Sep 4 09:07:11 PDT 2025
https://github.com/AZero13 created https://github.com/llvm/llvm-project/pull/156915
It should be one use, just like AArch64
>From 454ebd37f57628440bb94acd914ae75dd70ec0fe Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 4 Sep 2025 11:42:11 -0400
Subject: [PATCH 1/2] Create ushlsat.ll
---
llvm/test/CodeGen/ARM/ushlsat.ll | 71 ++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 llvm/test/CodeGen/ARM/ushlsat.ll
diff --git a/llvm/test/CodeGen/ARM/ushlsat.ll b/llvm/test/CodeGen/ARM/ushlsat.ll
new file mode 100644
index 0000000000000..6d7e388075de4
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ushlsat.ll
@@ -0,0 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s --check-prefix V7M
+; RUN: llc -mtriple=armv7a-eabi %s -o - | FileCheck %s --check-prefix V7A
+; RUN: llc -mtriple=thumbv7a-eabi %s -o - | FileCheck %s --check-prefix V7A-T
+; RUN: llc -mtriple=armv6m-eabi %s -o - | FileCheck %s --check-prefix V6M
+
+; Do not fold shlsat -> shl.
+define i16 @combine_shlsat_to_shl_no_fold(i16 %x) nounwind {
+; V7M-LABEL: combine_shlsat_to_shl_no_fold:
+; V7M: @ %bb.0:
+; V7M-NEXT: movs r1, #0
+; V7M-NEXT: movs r3, #0
+; V7M-NEXT: movt r1, #16383
+; V7M-NEXT: movt r3, #8191
+; V7M-NEXT: and.w r1, r1, r0, lsl #14
+; V7M-NEXT: and.w r0, r3, r0, lsl #14
+; V7M-NEXT: cmp r1, r0
+; V7M-NEXT: lsl.w r2, r1, #3
+; V7M-NEXT: it ne
+; V7M-NEXT: movne.w r2, #-1
+; V7M-NEXT: lsrs r0, r2, #16
+; V7M-NEXT: bx lr
+;
+; V7A-LABEL: combine_shlsat_to_shl_no_fold:
+; V7A: @ %bb.0:
+; V7A-NEXT: movw r1, #0
+; V7A-NEXT: movw r3, #0
+; V7A-NEXT: movt r1, #16383
+; V7A-NEXT: movt r3, #8191
+; V7A-NEXT: and r1, r1, r0, lsl #14
+; V7A-NEXT: and r0, r3, r0, lsl #14
+; V7A-NEXT: cmp r1, r0
+; V7A-NEXT: lsl r2, r1, #3
+; V7A-NEXT: mvnne r2, #0
+; V7A-NEXT: lsr r0, r2, #16
+; V7A-NEXT: bx lr
+;
+; V7A-T-LABEL: combine_shlsat_to_shl_no_fold:
+; V7A-T: @ %bb.0:
+; V7A-T-NEXT: movs r1, #0
+; V7A-T-NEXT: movs r3, #0
+; V7A-T-NEXT: movt r1, #16383
+; V7A-T-NEXT: movt r3, #8191
+; V7A-T-NEXT: and.w r1, r1, r0, lsl #14
+; V7A-T-NEXT: and.w r0, r3, r0, lsl #14
+; V7A-T-NEXT: cmp r1, r0
+; V7A-T-NEXT: lsl.w r2, r1, #3
+; V7A-T-NEXT: it ne
+; V7A-T-NEXT: movne.w r2, #-1
+; V7A-T-NEXT: lsrs r0, r2, #16
+; V7A-T-NEXT: bx lr
+;
+; V6M-LABEL: combine_shlsat_to_shl_no_fold:
+; V6M: @ %bb.0:
+; V6M-NEXT: lsls r0, r0, #16
+; V6M-NEXT: lsrs r0, r0, #18
+; V6M-NEXT: lsls r1, r0, #16
+; V6M-NEXT: lsls r0, r0, #19
+; V6M-NEXT: lsrs r2, r0, #3
+; V6M-NEXT: cmp r1, r2
+; V6M-NEXT: beq .LBB0_2
+; V6M-NEXT: @ %bb.1:
+; V6M-NEXT: movs r0, #0
+; V6M-NEXT: mvns r0, r0
+; V6M-NEXT: .LBB0_2:
+; V6M-NEXT: lsrs r0, r0, #16
+; V6M-NEXT: bx lr
+ %x2 = lshr i16 %x, 2
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 %x2, i16 3)
+ ret i16 %tmp
+}
>From 382bc96462e2186517c3558ac8c73171dbecc888 Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 4 Sep 2025 11:44:29 -0400
Subject: [PATCH 2/2] [ARM] Specify hasOneUse for
shouldFoldConstantShiftPairToMask
It should be one use, just like AArch64
---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 +++
llvm/test/CodeGen/ARM/ushlsat.ll | 39 ++++++++++---------------
2 files changed, 19 insertions(+), 24 deletions(-)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b5c01eafcf108..45918232e3a70 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -13885,6 +13885,10 @@ bool ARMTargetLowering::shouldFoldConstantShiftPairToMask(
N->getOperand(0).getOpcode() == ISD::SHL)) &&
"Expected shift-shift mask");
+ // Don't allow multiuse shift folding with the same shift amount.
+ if (!N->getOperand(0)->hasOneUse())
+ return false;
+
if (!Subtarget->isThumb1Only())
return true;
diff --git a/llvm/test/CodeGen/ARM/ushlsat.ll b/llvm/test/CodeGen/ARM/ushlsat.ll
index 6d7e388075de4..149e703430c45 100644
--- a/llvm/test/CodeGen/ARM/ushlsat.ll
+++ b/llvm/test/CodeGen/ARM/ushlsat.ll
@@ -9,45 +9,36 @@ define i16 @combine_shlsat_to_shl_no_fold(i16 %x) nounwind {
; V7M-LABEL: combine_shlsat_to_shl_no_fold:
; V7M: @ %bb.0:
; V7M-NEXT: movs r1, #0
-; V7M-NEXT: movs r3, #0
; V7M-NEXT: movt r1, #16383
-; V7M-NEXT: movt r3, #8191
-; V7M-NEXT: and.w r1, r1, r0, lsl #14
-; V7M-NEXT: and.w r0, r3, r0, lsl #14
-; V7M-NEXT: cmp r1, r0
-; V7M-NEXT: lsl.w r2, r1, #3
+; V7M-NEXT: and.w r0, r1, r0, lsl #14
+; V7M-NEXT: lsls r1, r0, #3
+; V7M-NEXT: cmp.w r0, r1, lsr #3
; V7M-NEXT: it ne
-; V7M-NEXT: movne.w r2, #-1
-; V7M-NEXT: lsrs r0, r2, #16
+; V7M-NEXT: movne.w r1, #-1
+; V7M-NEXT: lsrs r0, r1, #16
; V7M-NEXT: bx lr
;
; V7A-LABEL: combine_shlsat_to_shl_no_fold:
; V7A: @ %bb.0:
; V7A-NEXT: movw r1, #0
-; V7A-NEXT: movw r3, #0
; V7A-NEXT: movt r1, #16383
-; V7A-NEXT: movt r3, #8191
-; V7A-NEXT: and r1, r1, r0, lsl #14
-; V7A-NEXT: and r0, r3, r0, lsl #14
-; V7A-NEXT: cmp r1, r0
-; V7A-NEXT: lsl r2, r1, #3
-; V7A-NEXT: mvnne r2, #0
-; V7A-NEXT: lsr r0, r2, #16
+; V7A-NEXT: and r0, r1, r0, lsl #14
+; V7A-NEXT: lsl r1, r0, #3
+; V7A-NEXT: cmp r0, r1, lsr #3
+; V7A-NEXT: mvnne r1, #0
+; V7A-NEXT: lsr r0, r1, #16
; V7A-NEXT: bx lr
;
; V7A-T-LABEL: combine_shlsat_to_shl_no_fold:
; V7A-T: @ %bb.0:
; V7A-T-NEXT: movs r1, #0
-; V7A-T-NEXT: movs r3, #0
; V7A-T-NEXT: movt r1, #16383
-; V7A-T-NEXT: movt r3, #8191
-; V7A-T-NEXT: and.w r1, r1, r0, lsl #14
-; V7A-T-NEXT: and.w r0, r3, r0, lsl #14
-; V7A-T-NEXT: cmp r1, r0
-; V7A-T-NEXT: lsl.w r2, r1, #3
+; V7A-T-NEXT: and.w r0, r1, r0, lsl #14
+; V7A-T-NEXT: lsls r1, r0, #3
+; V7A-T-NEXT: cmp.w r0, r1, lsr #3
; V7A-T-NEXT: it ne
-; V7A-T-NEXT: movne.w r2, #-1
-; V7A-T-NEXT: lsrs r0, r2, #16
+; V7A-T-NEXT: movne.w r1, #-1
+; V7A-T-NEXT: lsrs r0, r1, #16
; V7A-T-NEXT: bx lr
;
; V6M-LABEL: combine_shlsat_to_shl_no_fold:
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