[llvm] 9bb860e - [PowerPC] Remove non-existent operand of CP_COPY instruction (#153867)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 4 07:12:59 PDT 2025
Author: Sergei Barannikov
Date: 2025-09-04T17:12:54+03:00
New Revision: 9bb860eca57bbe2f15dcdef7c21319cbf40f0214
URL: https://github.com/llvm/llvm-project/commit/9bb860eca57bbe2f15dcdef7c21319cbf40f0214
DIFF: https://github.com/llvm/llvm-project/commit/9bb860eca57bbe2f15dcdef7c21319cbf40f0214.diff
LOG: [PowerPC] Remove non-existent operand of CP_COPY instruction (#153867)
The operand is not encoded, decoded, or printed and would break MCInst
verification if we had one.
Extracted from #156358, where the extra operand causes DecoderEmitter
to emit an error about an operand with a missing encoding.
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 9359311e99cf6..269d30318bca8 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1984,7 +1984,7 @@ def : Pat<(int_ppc_darnraw), (DARN 2)>;
class X_RA5_RB5<bits<6> opcode, bits<10> xo, string opc, RegisterOperand ty,
InstrItinClass itin, list<dag> pattern>
- : X_L1_RS5_RS5<opcode, xo, (outs), (ins ty:$RA, ty:$RB, u1imm:$L),
+ : X_L1_RS5_RS5<opcode, xo, (outs), (ins ty:$RA, ty:$RB),
!strconcat(opc, " $RA, $RB"), itin, pattern>{
let L = 1;
}
More information about the llvm-commits
mailing list