[llvm] Allow Specifying SGMasks for Inline Asm (PR #155491)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 4 05:01:11 PDT 2025


arsenm wrote:

> @arsenm Thanks, I switched to using `StringRef`.
> 
> Regarding the parsing of the inline assembly, the goal of this PR is to allow the user to optionally specify the schedule group mask for a specific inline assembly instruction to allow schedule group barriers to work correctly with that instruction. Parsing a special token out of the inline assembly is the only reasonable mechanism I currently see for accomplishing that, but I am open to suggestions.

I am going to outright reject the concept of trying to parse the content of inline assembly. I am firmly in the camp of wont fixing any performance issue involving inline assembly 

https://github.com/llvm/llvm-project/pull/155491


More information about the llvm-commits mailing list