[clang] [llvm] [AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (PR #127837)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

Thanks for the feedback.  I'd rather not revert this patch because it forms the basis for other work, namely allowing the use of pairwise load/store instructions when targeting 128-bit SVE.  Of the remaining options my preference is (2) because I believe the current default is a better fit for more implementations.

https://github.com/llvm/llvm-project/pull/127837