[llvm] d0246fe - [Sparc] Remove extra ASRRegs operand in SMAC/UMAC instructions (#156751)

[via llvm-commits]

Author: Sergei Barannikov
Date: 2025-09-04T11:06:23+03:00
New Revision: d0246fe1e79c6ea06b6b72f66a71a96a3342aa42

URL: https://github.com/llvm/llvm-project/commit/d0246fe1e79c6ea06b6b72f66a71a96a3342aa42
DIFF: https://github.com/llvm/llvm-project/commit/d0246fe1e79c6ea06b6b72f66a71a96a3342aa42.diff

LOG: [Sparc] Remove extra ASRRegs operand in SMAC/UMAC instructions (#156751)

The `$asr18` operand is not decoded/encoded/printed,
and ASR18 is already in the `Uses` list.
Extracted from #156358, where the extra operand causes DecoderEmitter
to emit an error about an operand with a missing encoding.

Added: 
    

Modified: 
    llvm/lib/Target/Sparc/SparcInstrInfo.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td
index 1a32eafb0e83d..53972d6c105a4 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.td
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td
@@ -1785,22 +1785,22 @@ let Predicates = [HasV9], Uses = [ASR3], Constraints = "$swap = $rd" in
 // as inline assembler-supported instructions.
 let Predicates = [HasUMAC_SMAC], Defs = [Y, ASR18], Uses = [Y, ASR18] in {
   def SMACrr :  F3_1<2, 0b111111,
-                   (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2, ASRRegs:$asr18),
+                   (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
                    "smac $rs1, $rs2, $rd",
                    [], IIC_smac_umac>;
 
   def SMACri :  F3_2<2, 0b111111,
-                  (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13, ASRRegs:$asr18),
+                  (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13),
                    "smac $rs1, $simm13, $rd",
                    [], IIC_smac_umac>;
 
   def UMACrr :  F3_1<2, 0b111110,
-                  (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2, ASRRegs:$asr18),
+                  (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
                    "umac $rs1, $rs2, $rd",
                    [], IIC_smac_umac>;
 
   def UMACri :  F3_2<2, 0b111110,
-                  (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13, ASRRegs:$asr18),
+                  (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13),
                    "umac $rs1, $simm13, $rd",
                    [], IIC_smac_umac>;
 }