[llvm] [AMDGPU] Identify vector idiom to unlock SROA (PR #156791)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> HIP vector types often lower to aggregates and get copied with memcpy

I think the HIP vector type structure definitions are broken, and should be defined with a union of ext_vector_type such that the original access is emitted as an under-aligned load of IR vector.


Why does this need to be a new pass? instcombine already does replacement of small memcpy and this is a small extension on top of that? 




https://github.com/llvm/llvm-project/pull/156791