[llvm] [AMDGPU][True16][CodeGen] add a d16 predicate for true16 mode (PR #156574)

[Joe Nash via llvm-commits]

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@@ -1571,6 +1591,11 @@ class ScratchLoadSaddrPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType v
   (inst $saddr, $offset)
 >;
 
+class ScratchLoadSaddrPat_t16 <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat <
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Sisyph wrote:

All of these take an existing dag output pattern and wrap it in EXTRACT_SUBREG (*, lo16). There should be a less verbose way to write all the new patterns, by using the existing output pattern as an operand, having a let to override the output pattern, or something of that nature. 

https://github.com/llvm/llvm-project/pull/156574