[llvm] [CodeGen, CHERI] Add capability types to MVT. (PR #156616)

Alexander Richardson via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 3 07:16:56 PDT 2025


================
@@ -357,6 +362,11 @@ def amdgpuBufferStridedPointer : ValueType<192, 252>;
 
 def aarch64mfp8 : ValueType<8,  253>;  // 8-bit value in FPR (AArch64)
 
+def c64
+    : VTCapability<64, !add(aarch64mfp8.Value, 1)>; // 64-bit capability value
----------------
arichardson wrote:

Yeah I believe I changed it to an add downstream to make it easier to resolve merge conflicts. With it being upstream that will no longer be an issue.

https://github.com/llvm/llvm-project/pull/156616


More information about the llvm-commits mailing list