[llvm] 49ffe31 - [AMDGPU][LIT][NFC] Adding -mtriple for AMDGPUAnnotateUniformValues Pass tests (#156437)

via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 3 03:02:32 PDT 2025


Author: Vikash Gupta
Date: 2025-09-03T15:32:28+05:30
New Revision: 49ffe31defafd0cd87b2c194e57a02ad428fdae4

URL: https://github.com/llvm/llvm-project/commit/49ffe31defafd0cd87b2c194e57a02ad428fdae4
DIFF: https://github.com/llvm/llvm-project/commit/49ffe31defafd0cd87b2c194e57a02ad428fdae4.diff

LOG: [AMDGPU][LIT][NFC] Adding -mtriple for AMDGPUAnnotateUniformValues Pass tests (#156437)

It specifies the target machine as AMDGPU for
AMDGPUAnnotateUniformValues pass-related test (that uses UA). Before in
its absense, the UA would consider everything Uniform resulting in
setting metadata incorrectly for AMDGPU. Now, after specifying the
AMDGPU, the UA would be rightful sets the right metadata as the test
gets commpiled for AMDGPU.

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll b/llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll
index f4947f6229dea..786f44dc220f1 100644
--- a/llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll
+++ b/llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S --amdgpu-annotate-uniform < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa --amdgpu-annotate-uniform < %s | FileCheck -check-prefix=OPT %s
 
 ; "load vaddr" depends on the store, so we should not mark vaddr as amdgpu.noclobber.
 
@@ -24,7 +24,7 @@ declare i32 @llvm.amdgcn.workitem.id.x()
 ; To check that %arrayidx0 is not marked as amdgpu.noclobber.
 
 ; OPT-LABEL: @atomicrmw_clobbers_load(
-; OPT:       %arrayidx0 = getelementptr inbounds [512 x i32], ptr addrspace(3) @lds0, i32 0, i32 %idx.0, !amdgpu.uniform !0
+; OPT:       %arrayidx0 = getelementptr inbounds [512 x i32], ptr addrspace(3) @lds0, i32 0, i32 %idx.0
 ; OPT-NEXT:  %val = atomicrmw xchg ptr addrspace(3) %arrayidx0, i32 3 seq_cst
 
 define amdgpu_kernel void @atomicrmw_clobbers_load(ptr addrspace(1) %out0, ptr addrspace(1) %out1) {


        


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