[llvm] [RISCV][GISel] Add initial support for rvv intrinsics (PR #156415)

[Jianjian Guan via llvm-commits]

jacquesguan wrote:

> > Another pr would be created for regbankselect pass to make vf form intriniscs have the right scalar register bank.
> 
> What about i64 scalar operands on RV32?

Not only the i64 scalar operands on RV32, all integer scalars that is not XLen bits should be legalized. I plan to implement these in the next pr to support vx and vf form intrinsics.

https://github.com/llvm/llvm-project/pull/156415